microcontroller

SPC5745RK1MMT5

Symbol
VSSA1VSSA2PA[0]/ETPU24_A/CS0_M0/DSPI_M0_CS0/MSC0_CS0A3PA[2]/ETPU22_A/LINM0RX/SIN_M0/CS3_M0/DSPI_M0_SIN/CS3/MSC0_RX/SIPI_RXPA4VDD_HV_IO_MSCA5PA[9]/ETPU15_A/SCLK_M1/DSPI_M1_SCLKN/MSC1_CLKNA6PA[10]/ETPU14_A/SCLK_M1/CS2_M1/DSPI_M1_SCLKP/MSC1_CLKPA7PA[13]/ETPU11_A/CS0_M1/DSPI_M1_CS0/MSC1_CS0A8PH[15]/ETPU4_A/ETPU25_B/EMIOS1_23/RCH1_B/LINM1TXA9PH[11]/ETPU0_A/TCRCLK_A/ETPU21_B/EMIOS1_19/RCH0_A/LINM0RXA10VDD_HV_IO_MAINA11PH[5]/ETPU27_A/ETPU15_B/EMIOS1_13A12PH[1]/ETPU23_A/ETPU11_B/EMIOS1_9/RCH9_CA13PG[13]/ETPU19_A/ETPU7_B/EMIOS0_19/RCH3_C/SCLK_1A14PG[10]/ETPU16_A/ETPU4_B/EMIOS0_16/RCH6_C/CS1_1A15PG[6]/ETPU13_A/ETPU1_B/TCRCLK_B/EMIOS0_13/RCH4_A/SENT0_1/CAN1TX/LIN1TXA16PG[2]/ETPU9_A/ETPU29_B/EMIOS0_9/RCH6_B/SENT1_1/CAN2TX/LIN0TXA17PG[1]/EXT_ADDR0_3/ETPU8_A/ETPU28_B/EMIOS0_8/RCH6_A/SENT1_0/CAN2RX/LIN0RXA18VDD_HV_IO_MAINA19VSSA20VDD_LVB1VSSB2PA[1]/ETPU23_A/LINM0TX/CS1_M0/SIN_M0/DSPI_M0_SIN/CS1/MSC0_CS1/SIPI_RXNB3PA[3]/ETPU21_A/SCLK_M0/CS2_M0/DSPI_M0_SCLKN/MSC0_CLKNB4PA[6]/ETPU18_A/SOUT_M0/DSPI_M0_SOUTP/MSC0_SOUTP/SIPI_TXPB5VSSB6PA[11]/ETPU13_A/LINM1RX/SIN_M1/CS3_M1/MSC1_RXB7PA[12]/ETPU12_A/LINM1TX/CS1_M1/SIN_M1/MSC1_CS1B8PI[0]/ETPU5_A/ETPU26_B/EMIOS0_8/RCH1_C/CAN3RX/ERROR0B9PH[12]/ETPU1_A/TCRCLK_A/ETPU22_B/EMIOS1_20/RCH0_B/LINM0TXB10PH[8]/ETPU30_A/ETPU18_B/EMIOS1_16/LIN3TXB11VSSB12PH[2]/ETPU24_A/ETPU12_B/EMIOS1_10B13PG[12]/ETPU18_A/ETPU6_B/EMIOS0_18/RCH3_B/SOUT_1B14PG[11]/ETPU17_A/ETPU5_B/EMIOS0_17/RCH3_A/CAN3TX/SIN_1B15PG[5]/ETPU11_A/ETPU0_B/TCRCLK_B/EMIOS0_12/RCH6_C/SENT0_0/CAN1RX/LIN1RXB16PG[3]/ETPU30_B/EMIOS0_10/RCH8_A/SENT2_0B17VDD_HV_IO_MAINB18VSSB19PF[13]/EXT_ADDR1_3/ETPU7_A/ETPU27_B/EMIOS1_14/RCH4_C/CAN0RX/LIN2RXB20VDD_HV_IO_JTAGC1VDD_LVC2VSSC3PA[4]/ETPU20_A/SCLK_M0/DSPI_M0_SCLKP/MSC0_CLKP/SIPI_CLKC4PA[5]/ETPU19_A/SOUT_M0/SIN_M0/DSPI_M0_SOUTN/MSC0_SOUTN/SIPI_TXNC5PA[7]/ETPU17_A/SOUT_M1/DSPI_M1_SOUTN/MSC1_SOUTNC6PA[8]/ETPU16_A/SOUT_M1/SIN_M1/DSPI_M1_SOUTP/MSC1_SOUTPC7PI[3]/ETPU8_A/ETPU29_B/EMIOS0_11/RCH2_CC8PI[1]/ETPU6_A/ETPU27_B/EMIOS0_9/RCH2_A/CAN3TX/ERROR1C9PH[13]/ETPU2_A/ETPU23_B/EMIOS1_21/RCH0_CC10PH[9]/ETPU31_A/ETPU19_B/EMIOS1_17C11PH[6]/ETPU28_A/ETPU16_B/EMIOS1_14C12PH[3]/ETPU25_A/ETPU13_B/EMIOS1_11/RCH4_C/CS3_1/ERROR1C13PG[15]/ETPU21_A/ETPU9_B/EMIOS0_21/RCH9_BC14PG[14]/ETPU20_A/ETPU8_B/EMIOS0_20/RCH9_AC15PG[9]/ETPU15_A/ETPU3_B/EMIOS0_15/RCH6_B/CAN3RX/CS0_1/SS_1C16PG[7]/ETPU14_A/ETPU2_B/EMIOS0_14/RCH8_CC17PG[4]/ETPU10_A/ETPU31_B/EMIOS0_11/RCH8_B/SENT2_1C18PF[12]/EXT_ADDR2_3/ETPU6_A/ETPU26_B/EMIOS1_15/RCH4_B/CAN0TX/LIN2TXC19PF[11]/ETPU5_A/ETPU25_B/EMIOS1_23/RCH4_A/CAN0RX/CAN1RX/LIN0RXC20PB[0]/TDOD1VSSD2VDD_LVD3PI[5]/ETPU10_A/ETPU31_B/EMIOS0_13/EMIOS1_23D7PI[4]/ETPU9_A/ETPU30_B/EMIOS0_12/EMIOS1_22D8PI[2]/ETPU7_A/ETPU28_B/EMIOS0_10/RCH2_BD9PH[14]/ETPU3_A/ETPU24_B/EMIOS1_22/RCH1_A/LINM1RXD10PH[10]/ETPU12_A/ETPU20_B/EMIOS1_18D11PH[7]/ETPU29_A/ETPU17_B/EMIOS1_15/RCH5_A/LIN3RXD12PH[4]/ETPU26_A/ETPU14_B/EMIOS1_12D13PH[0]/ETPU22_A/ETPU10_B/EMIOS1_8/RCH4_B/CS2_1/ERROR0D14PF[10]/ETPU24_B/EMIOS1_22/CAN1TX/LIN0TXD18PF[9]/ETPU23_B/EMIOS1_21/RCH5_CD19PF[8]/ETPU24_B/EMIOS1_20D20TMSE1TCKE2PB[1]/TDIE3PF[7]/ETPU23_B/CAN1RXE18VSSE19PF[6]/ETPU22_B/CAN1TXE20EXTALF1JCOMPF2RESETF3PF[5]/ETPU21_B/EMIOS1_19/RCH5_B/CAN0RX/LIN1RXF18PF[4]/ETPU20_B/EMIOS1_18/RCH5_A/CAN0TX/LIN1TXF19VDD_HV_IO_MAINF20XTALG1VSSG2PORSTG3PJ[1]/ETPU26_A/ETPU1_B/TCRCLK_B/ERROR0/CLKOUT/EVTO_1G4PF[3]/ETPU19_B/LIN3RXG17PF[2]/EXT_ADDR2_3/ETPU18_B/LIN3TXG18PF[1]/EXT_ADDR1_3/ETPU1_B/ETPU17_B/TCRCLK_B/EMIOS1_17/RCH9_C/CAN2RX/LIN2RXG19PF[0]/EXT_ADDR0_3/ETPU0_B/ETPU16_B/TCRCLK_B/EMIOS1_16/RCH9_B/CAN2TX/LIN2TXG20PJ[0]/ETPU25_A/ETPU0_B/TCRCLK_B/ERROR1/EVTO_0H1PJ[2]/ETPU2_BH2PJ[3]/ETPU27_A/ETPU3_B/EMIOS0_14/EVTI1H3PJ[4]/ETPU28_A/ETPU4_B/EMIOS0_15/RCH0_C/NMI/EVTI_0H4PZ[3]/SD0_3/SAR0_3/SAR2_3/ETPU1_A/TCRCLK_A/ETPU1_B/TCRCLK_B/EMIOS0_19H17PZ[2]/SD0_2/SAR0_2/SAR2_2/ETPU2_A/ETPU2_B/EMIOS0_18H18PZ[1]/SD0_1/SAR0_1/SAR2_1/ETPU3_A/ETPU3_B/EMIOS0_17H19PZ[0]/SD0_0/SAR0_0/SAR2_0/ETPU4_A/ETPU4_B/EMIOS0_16H20VDDSTBYJ1PJ[5]/ETPU29_A/ETPU5_B/EMIOS0_22/EVTI_0/RSTOUTJ2PJ[6]/ETPU25_A/ETPU6_BJ3PJ[7]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU30_A/ETPU7_B/EMIOS0_23/RCH2_B/IRQ0/EVTO_0J4VDD_LVJ9VDD_LVJ10VDD_LVJ11VDD_LVJ12PZ[7]/SD0_7/SAR0_7/SAR2_7/ETPU29_B/EMIOS0_23J17PZ[6]/SD0_6/SAR0_6/SAR2_6/ETPU30_B/EMIOS0_22J18PZ[5]/SD0_5/SAR0_5/SAR2_5/ETPU31_B/EMIOS0_21J19PZ[4]/SD0_4/SAR0_4/SAR2_4/ETPU0_A/TCRCLK_A/ETPU0_B/TCRCLK_B/EMIOS0_20J20VDD_HV_IO_MAINK1PJ[8]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU27_A/ETPU8_B/IRQ1K2PJ[9]/INJ_TRIG30/INJ_TRIG30/INJ_TRIG30/INJ_TRIG30/ETPU28_A/ETPU9_B/IRQ2K3PJ[10]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU29_A/ETPU10_B/IRQ3K4VSSK9VSSK10VSSK11VSSK12PZ[9]/SD1_1/SAR0_9/SAR2_9/ETPU27_B/EMIOS1_9/SENT1_1K17PZ[8]/SD1_0/SAR0_8/SAR2_8/ETPU28_B/EMIOS1_8/SENT0_1K18VSS_HV_ADV_SDK19VDD_HV_ADV_SDK20VSS_HV_ADV_SARY20VSS_HV_ADR_SARY19VDD_HV_ADR_SARY18PX[3]/SAR1_15/SAR2_25/ETPU21_A/ETPU1_B/TCRCLK_BY17PX[6]/SAR1_18/SAR3_13/ETPU18_A/ETPU14_BY16PX[9]/SAR1_21/SAR2_26/ETPU15_A/ETPU17_BY15PX[12]/SAR1_24/SAR3_17/ETPU20_B/IRQ7Y14PW[0]/SAR1_28/SAR3_19/ETPU10_A/ETPU24_BY13PC[10]/ETPU3_A/ETPU27_B/EMIOS0_18/RCH3_B/SOUT_3/FEC_RXD3/FEC_CRS_DVY12PC[7]/ETPU0_A/TCRCLK_A/ETPU24_B/EMIOS0_15/RCH2_B/CAN2TX/LINM1RX/MSC1_RX/FEC_RXD0Y11VDD_HV_IO_FECY10PC[0]/ETPU25_A/ETPU17_B/EMIOS0_8/RCH0_A/CS0_3/SS_3/FEC_REF_CLK/FEC_TXCLKY9PD[13]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU21_A/ETPU13_B/EMIOS1_21/RCH5_B/CAN0RX/LIN0RX/FEC_MDIO/IRQ8Y8PD[9]/ETPU17_A/ETPU9_B/EMIOS1_17/CS2_4Y7VDD_HV_IO_MAINY6PD[5]/ETPU13_A/ETPU5_B/EMIOS1_13/RCH8_A/CS4_4Y5PD[2]/ETPU10_A/ETPU2_B/EMIOS1_10/RCH7_A/LIN3RX/IRQ2Y4PD[0]/ETPU8_A/ETPU0_B/TCRCLK_B/EMIOS1_8/RCH0_A/CAN1RX/LIN1RX/IRQ0Y3VSSY2VSSY1VDD_HV_ADV_SARW20VSS_HV_ADV_SARW19VSS_HV_ADR_SARW18PX[4]/SAR1_16/SAR3_11/ETPU20_A/ETPU0_B/TCRCLK_BW17PX[7]/SAR1_19/SAR3_14/ETPU17_A/ETPU15_BW16PX[10]/SAR1_22/SAR2_27/ETPU14_A/ETPU18_B/EMIOS1_20/SENT0_1W15PX[13]/SAR1_25/SAR2_28/ETPU13_A/ETPU15_B/EMIOS1_21/SENT1_1/IRQ6W14PW[1]/SAR1_29/SAR2_30/ETPU9_A/ETPU13_B/EMIOS1_23/SENT0_0/IRQ3W13PC[11]/ETPU4_A/ETPU28_B/EMIOS0_19/RCH3_C/SIN_3/FEC_RXERW12VSSW11PC[4]/ETPU29_A/ETPU21_B/EMIOS0_12/RCH1_B/CS4_3/FEC_TXD2W10PC[1]/ETPU26_A/ETPU18_B/EMIOS0_9/RCH0_B/CS1_3/FEC_TXCLKW9PD[14]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU22_A/ETPU14_B/EMIOS1_22/RCH5_C/CAN0TX/LIN0TX/IRQ9/CLKOUTW8PD[10]/INJ_TRIG29/INJ_TRIG29/INJ_TRIG29/INJ_TRIG29/ETPU18_A/ETPU10_B/EMIOS1_18/RCH5_A/CS1_4/IRQ10W7VSSW6PD[6]/ETPU14_A/ETPU6_B/EMIOS1_14/RCH9_A/CS3_4W5PD[3]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU11_A/ETPU3_B/EMIOS1_11/RCH6_A/LIN3TX/IRQ6W4PD[1]/INJ_TRIG28/INJ_TRIG28/INJ_TRIG28/INJ_TRIG28/ETPU9_A/ETPU1_B/TCRCLK_B/EMIOS1_9/RCH4_A/CAN1TX/LIN1TX/IRQ1W3VSSW2VDD_LVW1PY[15]/SAR0_31/SAR1_11/SAR2_22/ETPU5_B/EMIOS0_17V20VDD_HV_ADV_SARV19PX[2]/SAR1_14/SAR2_24/ETPU22_A/ETPU2_BV18PX[5]/SAR1_17/SAR3_12/ETPU19_A/ETPU13_BV17PX[15]/SAR1_27/SAR3_18/ETPU11_A/ETPU23_B/IRQ4V16PX[11]/SAR1_23/SAR3_16/ETPU19_BV15PX[14]/SAR1_26/SAR2_29/ETPU12_A/ETPU14_B/EMIOS1_22/SENT2_1/IRQ5V14PW[2]/SAR1_30/SAR2_31/ETPU8_A/ETPU12_B/EMIOS0_23/SENT1_0/IRQ2V13PC[12]/ETPU5_A/ETPU29_B/EMIOS0_20/RCH4_B/SCLK_3/FEC_RXCLKV12PC[8]/ETPU1_A/TCRCLK_A/ETPU25_B/EMIOS0_16/RCH2_C/LINM0TX/FEC_RXD1V11PC[5]/ETPU30_A/ETPU22_B/EMIOS0_13/RCH1_C/CS5_3/FEC_TXD1/FEC_COLV10PC[2]/ETPU27_A/ETPU19_B/EMIOS0_10/RCH0_C/CS2_3/FEC_TXENV9PD[15]/ETPU23_A/ETPU15_B/EMIOS1_23/SIN_4V8PD[11]/ETPU19_A/ETPU11_B/EMIOS1_19/CS0_4/SS_4V7PD[8]/ETPU16_A/ETPU8_B/EMIOS1_16/RCH3_A/CAN3TX/LIN2TX/FEC_MDCV6PD[7]/ETPU15_A/ETPU7_B/EMIOS1_15/RCH2_A/CAN3RX/LIN2RXV5PD[4]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU12_A/ETPU4_B/EMIOS1_12/RCH1_A/CS5_4/IRQ7V4VSSV3VDD_LVV2PK[14]/ETPU7_A/ETPU29_B/EMIOS1_19/RCH9_A/CS3_2/IRQ3V1PY[14]/SAR0_30/SAR1_10/SAR3_8/ETPU24_A/ETPU6_BU20PX[0]/SAR1_12/SAR3_9/ETPU23_A/ETPU4_BU19PX[1]/SAR1_13/SAR2_23/SAR3_10/ETPU3_B/EMIOS0_18U18PX[8]/SAR1_20/SAR3_15/ETPU16_A/ETPU16_BU14PW[3]/SAR1_31/SAR3_20/ETPU7_A/ETPU31_B/EMIOS0_22/SENT2_0/IRQ1U13PC[13]/ETPU6_A/ETPU30_B/EMIOS0_21/RCH4_C/FEC_RXDVU12PC[9]/ETPU2_A/ETPU26_B/EMIOS0_17/RCH3_A/LINM0RX/SIN_3/MSC0_RX/FEC_RXD2U11PC[6]/ETPU31_A/ETPU23_B/EMIOS0_14/RCH2_A/CAN2RX/LINM1TX/FEC_TXD0U10PC[3]/ETPU28_A/ETPU20_B/EMIOS0_11/RCH1_A/CS3_3/FEC_TXD3U9PE[0]/ETPU24_A/ETPU16_B/EMIOS0_8/SCLK_4U8PD[12]/ETPU20_A/ETPU12_B/EMIOS1_20/SOUT_4U7VDD_LVU3PK[13]/ETPU6_A/ETPU28_B/EMIOS1_18/RCH6_A/CS2_2/SIN_2/IRQ4U2PK[12]/ETPU5_A/ETPU27_B/EMIOS1_17/RCH7_A/CS1_2/SCLK_1/IRQ5U1PY[11]/SAR0_27/SAR1_7/SAR3_5/ETPU26_A/ETPU9_BT20PY[12]/SAR0_28/SAR1_8/SAR3_6/ETPU25_A/ETPU8_BT19PY[13]/SAR0_29/SAR1_9/SAR3_7/ETPU7_B/EMIOS0_16T18PK[11]/ETPU4_A/ETPU26_B/EMIOS1_16/RCH7_B/CS0_2/SS_2T3PK[10]/ETPU3_A/ETPU25_B/EMIOS0_23/RCH7_C/SOUT_2T2VDD_HV_IO_MAINT1PY[8]/SAR0_24/SAR1_4/SAR3_3/ETPU28_A/ETPU12_BR20PY[9]/SAR0_25/SAR1_5/SAR3_4/ETPU27_A/ETPU11_B/EMIOS0_14R19PY[10]/SAR0_26/SAR1_6/SAR2_21/ETPU10_B/EMIOS0_15R18PK[9]/ETPU2_A/ETPU24_B/EMIOS0_22/CS4_2R3VSSR2PK[8]/ETPU1_A/TCRCLK_A/ETPU23_B/EMIOS0_21/RCH8_C/SIN_2R1PY[4]/SAR0_20/SAR1_0/SAR2_19/ETPU16_B/EMIOS0_11P20PY[5]/SAR0_21/SAR1_1/SAR3_1/ETPU29_A/ETPU15_BP19PY[6]/SAR0_22/SAR1_2/SAR3_2/ETPU14_B/EMIOS0_12P18PY[7]/SAR0_23/SAR1_3/SAR2_20/ETPU13_B/EMIOS0_13P17PK[7]/ETPU0_A/TCRCLK_A/ETPU22_B/EMIOS0_20/RCH8_B/SCLK_2P4PK[5]/ETPU21_B/RCH8_A/CS0_0/SS_0P3PK[4]/ETPU20_B/EMIOS0_19/CS2_0P2PK[2]/ETPU19_B/RCH7_C/SOUT_0P1PY[0]/SD2_0/SAR0_16/SAR2_16/ETPU20_B/EMIOS0_8/SENT0_0N20PY[1]/SD2_1/SAR0_17/SAR2_17/ETPU19_B/EMIOS0_9/SENT1_0N19PY[2]/SD2_2/SAR0_18/SAR2_18/ETPU31_A/ETPU18_B/EMIOS0_10/SENT2_0N18PY[3]/SD2_3/SAR0_19/SAR3_0/ETPU30_A/ETPU17_BN17PK[1]/ETPU18_B/RCH7_B/SIN_0N4PK[0]/ETPU17_B/EMIOS1_13/RCH7_A/CS3_0N3PJ[15]/ETPU15_B/EMIOS1_12N2VDD_HV_FLAN1PZ[14]/SD1_6/SAR0_14/SAR2_14/ETPU22_B/EMIOS1_14M20PZ[15]/SD1_7/SAR0_15/SAR2_15/ETPU21_B/EMIOS1_15M19PZ[12]/SD1_4/SAR0_12/SAR2_12/ETPU24_B/EMIOS1_12M18PZ[13]/SD1_5/SAR0_13/SAR2_13/ETPU23_B/EMIOS1_13M17VDD_LVM12VDD_LVM11VDD_LVM10VDD_LVM9PJ[14]/ETPU14_B/EMIOS1_11/SCLK_0/IRQ7/ERRORINM4PJ[13]/ETPU13_B/EMIOS1_10/CS4_0/IRQ6M3TESTMODEM2VDD_HV_PMCM1VDD_HV_ADR_SDL20VSS_HV_ADR_SDL19PZ[10]/SD1_2/SAR0_10/SAR2_10/ETPU26_B/EMIOS1_10/SENT2_1L18PZ[11]/SD1_3/SAR0_11/SAR2_11/ETPU25_B/EMIOS1_11L17VSSL12VSSL11VSSL10VSSL9PJ[12]/INJ_TRIG31/INJ_TRIG31/INJ_TRIG31/INJ_TRIG31/ETPU12_B/EMIOS1_9/CS5_0/IRQ5L4PJ[11]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU31_A/ETPU11_B/EMIOS1_8/RCH5_B/CS1_0/IRQ4/ERROR0L3VSSL2VRC_CTRLL1
Footprint
A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20C1C2C3C4C5C6C7C8C9C10C11C12C13C14C15C16C17C18C19C20D1D2D3D7D8D9D10D11D12D13D14D18D19D20E1E2E3E18E19E20F1F2F3F18F19F20G1G2G3G4G17G18G19G20H1H2H3H4H17H18H19H20J1J2J3J4J9J10J11J12J17J18J19J20K1K2K3K4K9K10K11K12K17K18K19K20L1L2L3L4L9L10L11L12L17L18L19L20M1M2M3M4M9M10M11M12M17M18M19M20N1N2N3N4N17N18N19N20P1P2P3P4P17P18P19P20R1R2R3R18R19R20T1T2T3T18T19T20U1U2U3U7U8U9U10U11U12U13U14U18U19U20V1V2V3V4V5V6V7V8V9V10V11V12V13V14V15V16V17V18V19V20W1W2W3W4W5W6W7W8W9W10W11W12W13W14W15W16W17W18W19W20Y1Y2Y3Y4Y5Y6Y7Y8Y9Y10Y11Y12Y13Y14Y15Y16Y17Y18Y19Y20
3D Model
No 3D preview

Pin Map

PinNameTypeMountShapeWidth × Height (mm)
VSSgroundSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PA[0]/ETPU24_A/CS0_M0/DSPI_M0_CS0/MSC0_CS0passiveSMDcircle0.412×0.412
PA[2]/ETPU22_A/LINM0RX/SIN_M0/CS3_M0/DSPI_M0_SIN/CS3/MSC0_RX/SIPI_RXPpassiveSMDcircle0.412×0.412
VDD_HV_IO_MSCpowerSMDcircle0.412×0.412
PA[9]/ETPU15_A/SCLK_M1/DSPI_M1_SCLKN/MSC1_CLKNpassiveSMDcircle0.412×0.412
PA[10]/ETPU14_A/SCLK_M1/CS2_M1/DSPI_M1_SCLKP/MSC1_CLKPpassiveSMDcircle0.412×0.412
PA[13]/ETPU11_A/CS0_M1/DSPI_M1_CS0/MSC1_CS0passiveSMDcircle0.412×0.412
PH[15]/ETPU4_A/ETPU25_B/EMIOS1_23/RCH1_B/LINM1TXoutputSMDcircle0.412×0.412
PH[11]/ETPU0_A/TCRCLK_A/ETPU21_B/EMIOS1_19/RCH0_A/LINM0RXoutputSMDcircle0.412×0.412
VDD_HV_IO_MAINpowerSMDcircle0.412×0.412
PH[5]/ETPU27_A/ETPU15_B/EMIOS1_13outputSMDcircle0.412×0.412
PH[1]/ETPU23_A/ETPU11_B/EMIOS1_9/RCH9_CoutputSMDcircle0.412×0.412
PG[13]/ETPU19_A/ETPU7_B/EMIOS0_19/RCH3_C/SCLK_1passiveSMDcircle0.412×0.412
PG[10]/ETPU16_A/ETPU4_B/EMIOS0_16/RCH6_C/CS1_1passiveSMDcircle0.412×0.412
PG[6]/ETPU13_A/ETPU1_B/TCRCLK_B/EMIOS0_13/RCH4_A/SENT0_1/CAN1TX/LIN1TXpassiveSMDcircle0.412×0.412
PG[2]/ETPU9_A/ETPU29_B/EMIOS0_9/RCH6_B/SENT1_1/CAN2TX/LIN0TXpassiveSMDcircle0.412×0.412
PG[1]/EXT_ADDR0_3/ETPU8_A/ETPU28_B/EMIOS0_8/RCH6_A/SENT1_0/CAN2RX/LIN0RXpassiveSMDcircle0.412×0.412
VDD_HV_IO_MAINpowerSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PA[1]/ETPU23_A/LINM0TX/CS1_M0/SIN_M0/DSPI_M0_SIN/CS1/MSC0_CS1/SIPI_RXNpassiveSMDcircle0.412×0.412
PA[3]/ETPU21_A/SCLK_M0/CS2_M0/DSPI_M0_SCLKN/MSC0_CLKNpassiveSMDcircle0.412×0.412
PA[6]/ETPU18_A/SOUT_M0/DSPI_M0_SOUTP/MSC0_SOUTP/SIPI_TXPpassiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PA[11]/ETPU13_A/LINM1RX/SIN_M1/CS3_M1/MSC1_RXpassiveSMDcircle0.412×0.412
PA[12]/ETPU12_A/LINM1TX/CS1_M1/SIN_M1/MSC1_CS1passiveSMDcircle0.412×0.412
PI[0]/ETPU5_A/ETPU26_B/EMIOS0_8/RCH1_C/CAN3RX/ERROR0passiveSMDcircle0.412×0.412
PH[12]/ETPU1_A/TCRCLK_A/ETPU22_B/EMIOS1_20/RCH0_B/LINM0TXoutputSMDcircle0.412×0.412
PH[8]/ETPU30_A/ETPU18_B/EMIOS1_16/LIN3TXoutputSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PH[2]/ETPU24_A/ETPU12_B/EMIOS1_10outputSMDcircle0.412×0.412
PG[12]/ETPU18_A/ETPU6_B/EMIOS0_18/RCH3_B/SOUT_1passiveSMDcircle0.412×0.412
PG[11]/ETPU17_A/ETPU5_B/EMIOS0_17/RCH3_A/CAN3TX/SIN_1passiveSMDcircle0.412×0.412
PG[5]/ETPU11_A/ETPU0_B/TCRCLK_B/EMIOS0_12/RCH6_C/SENT0_0/CAN1RX/LIN1RXpassiveSMDcircle0.412×0.412
PG[3]/ETPU30_B/EMIOS0_10/RCH8_A/SENT2_0passiveSMDcircle0.412×0.412
VDD_HV_IO_MAINpowerSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PF[13]/EXT_ADDR1_3/ETPU7_A/ETPU27_B/EMIOS1_14/RCH4_C/CAN0RX/LIN2RXpassiveSMDcircle0.412×0.412
VDD_HV_IO_JTAGpowerSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PA[4]/ETPU20_A/SCLK_M0/DSPI_M0_SCLKP/MSC0_CLKP/SIPI_CLKpassiveSMDcircle0.412×0.412
PA[5]/ETPU19_A/SOUT_M0/SIN_M0/DSPI_M0_SOUTN/MSC0_SOUTN/SIPI_TXNpassiveSMDcircle0.412×0.412
PA[7]/ETPU17_A/SOUT_M1/DSPI_M1_SOUTN/MSC1_SOUTNpassiveSMDcircle0.412×0.412
PA[8]/ETPU16_A/SOUT_M1/SIN_M1/DSPI_M1_SOUTP/MSC1_SOUTPpassiveSMDcircle0.412×0.412
PI[3]/ETPU8_A/ETPU29_B/EMIOS0_11/RCH2_CpassiveSMDcircle0.412×0.412
PI[1]/ETPU6_A/ETPU27_B/EMIOS0_9/RCH2_A/CAN3TX/ERROR1passiveSMDcircle0.412×0.412
PH[13]/ETPU2_A/ETPU23_B/EMIOS1_21/RCH0_CoutputSMDcircle0.412×0.412
PH[9]/ETPU31_A/ETPU19_B/EMIOS1_17outputSMDcircle0.412×0.412
PH[6]/ETPU28_A/ETPU16_B/EMIOS1_14outputSMDcircle0.412×0.412
PH[3]/ETPU25_A/ETPU13_B/EMIOS1_11/RCH4_C/CS3_1/ERROR1outputSMDcircle0.412×0.412
PG[15]/ETPU21_A/ETPU9_B/EMIOS0_21/RCH9_BpassiveSMDcircle0.412×0.412
PG[14]/ETPU20_A/ETPU8_B/EMIOS0_20/RCH9_ApassiveSMDcircle0.412×0.412
PG[9]/ETPU15_A/ETPU3_B/EMIOS0_15/RCH6_B/CAN3RX/CS0_1/SS_1passiveSMDcircle0.412×0.412
PG[7]/ETPU14_A/ETPU2_B/EMIOS0_14/RCH8_CpassiveSMDcircle0.412×0.412
PG[4]/ETPU10_A/ETPU31_B/EMIOS0_11/RCH8_B/SENT2_1passiveSMDcircle0.412×0.412
PF[12]/EXT_ADDR2_3/ETPU6_A/ETPU26_B/EMIOS1_15/RCH4_B/CAN0TX/LIN2TXpassiveSMDcircle0.412×0.412
PF[11]/ETPU5_A/ETPU25_B/EMIOS1_23/RCH4_A/CAN0RX/CAN1RX/LIN0RXpassiveSMDcircle0.412×0.412
PB[0]/TDOpassiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
PI[5]/ETPU10_A/ETPU31_B/EMIOS0_13/EMIOS1_23passiveSMDcircle0.412×0.412
PI[4]/ETPU9_A/ETPU30_B/EMIOS0_12/EMIOS1_22passiveSMDcircle0.412×0.412
PI[2]/ETPU7_A/ETPU28_B/EMIOS0_10/RCH2_BpassiveSMDcircle0.412×0.412
PH[14]/ETPU3_A/ETPU24_B/EMIOS1_22/RCH1_A/LINM1RXoutputSMDcircle0.412×0.412
PH[10]/ETPU12_A/ETPU20_B/EMIOS1_18outputSMDcircle0.412×0.412
PH[7]/ETPU29_A/ETPU17_B/EMIOS1_15/RCH5_A/LIN3RXoutputSMDcircle0.412×0.412
PH[4]/ETPU26_A/ETPU14_B/EMIOS1_12outputSMDcircle0.412×0.412
PH[0]/ETPU22_A/ETPU10_B/EMIOS1_8/RCH4_B/CS2_1/ERROR0outputSMDcircle0.412×0.412
PF[10]/ETPU24_B/EMIOS1_22/CAN1TX/LIN0TXpassiveSMDcircle0.412×0.412
PF[9]/ETPU23_B/EMIOS1_21/RCH5_CpassiveSMDcircle0.412×0.412
PF[8]/ETPU24_B/EMIOS1_20passiveSMDcircle0.412×0.412
TMSpassiveSMDcircle0.412×0.412
TCKpassiveSMDcircle0.412×0.412
PB[1]/TDIpassiveSMDcircle0.412×0.412
PF[7]/ETPU23_B/CAN1RXpassiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PF[6]/ETPU22_B/CAN1TXpassiveSMDcircle0.412×0.412
EXTALpassiveSMDcircle0.412×0.412
JCOMPpassiveSMDcircle0.412×0.412
RESETinputSMDcircle0.412×0.412
PF[5]/ETPU21_B/EMIOS1_19/RCH5_B/CAN0RX/LIN1RXpassiveSMDcircle0.412×0.412
PF[4]/ETPU20_B/EMIOS1_18/RCH5_A/CAN0TX/LIN1TXpassiveSMDcircle0.412×0.412
VDD_HV_IO_MAINpowerSMDcircle0.412×0.412
XTALpassiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PORSTpassiveSMDcircle0.412×0.412
PJ[1]/ETPU26_A/ETPU1_B/TCRCLK_B/ERROR0/CLKOUT/EVTO_1passiveSMDcircle0.412×0.412
PF[3]/ETPU19_B/LIN3RXpassiveSMDcircle0.412×0.412
PF[2]/EXT_ADDR2_3/ETPU18_B/LIN3TXpassiveSMDcircle0.412×0.412
PF[1]/EXT_ADDR1_3/ETPU1_B/ETPU17_B/TCRCLK_B/EMIOS1_17/RCH9_C/CAN2RX/LIN2RXpassiveSMDcircle0.412×0.412
PF[0]/EXT_ADDR0_3/ETPU0_B/ETPU16_B/TCRCLK_B/EMIOS1_16/RCH9_B/CAN2TX/LIN2TXpassiveSMDcircle0.412×0.412
PJ[0]/ETPU25_A/ETPU0_B/TCRCLK_B/ERROR1/EVTO_0passiveSMDcircle0.412×0.412
PJ[2]/ETPU2_BpassiveSMDcircle0.412×0.412
PJ[3]/ETPU27_A/ETPU3_B/EMIOS0_14/EVTI1passiveSMDcircle0.412×0.412
PJ[4]/ETPU28_A/ETPU4_B/EMIOS0_15/RCH0_C/NMI/EVTI_0passiveSMDcircle0.412×0.412
PZ[3]/SD0_3/SAR0_3/SAR2_3/ETPU1_A/TCRCLK_A/ETPU1_B/TCRCLK_B/EMIOS0_19passiveSMDcircle0.412×0.412
PZ[2]/SD0_2/SAR0_2/SAR2_2/ETPU2_A/ETPU2_B/EMIOS0_18passiveSMDcircle0.412×0.412
PZ[1]/SD0_1/SAR0_1/SAR2_1/ETPU3_A/ETPU3_B/EMIOS0_17passiveSMDcircle0.412×0.412
PZ[0]/SD0_0/SAR0_0/SAR2_0/ETPU4_A/ETPU4_B/EMIOS0_16passiveSMDcircle0.412×0.412
VDDSTBYpassiveSMDcircle0.412×0.412
PJ[5]/ETPU29_A/ETPU5_B/EMIOS0_22/EVTI_0/RSTOUTpassiveSMDcircle0.412×0.412
PJ[6]/ETPU25_A/ETPU6_BpassiveSMDcircle0.412×0.412
PJ[7]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU30_A/ETPU7_B/EMIOS0_23/RCH2_B/IRQ0/EVTO_0passiveSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
PZ[7]/SD0_7/SAR0_7/SAR2_7/ETPU29_B/EMIOS0_23passiveSMDcircle0.412×0.412
PZ[6]/SD0_6/SAR0_6/SAR2_6/ETPU30_B/EMIOS0_22passiveSMDcircle0.412×0.412
PZ[5]/SD0_5/SAR0_5/SAR2_5/ETPU31_B/EMIOS0_21passiveSMDcircle0.412×0.412
PZ[4]/SD0_4/SAR0_4/SAR2_4/ETPU0_A/TCRCLK_A/ETPU0_B/TCRCLK_B/EMIOS0_20passiveSMDcircle0.412×0.412
VDD_HV_IO_MAINpowerSMDcircle0.412×0.412
PJ[8]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU27_A/ETPU8_B/IRQ1passiveSMDcircle0.412×0.412
PJ[9]/INJ_TRIG30/INJ_TRIG30/INJ_TRIG30/INJ_TRIG30/ETPU28_A/ETPU9_B/IRQ2passiveSMDcircle0.412×0.412
PJ[10]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU29_A/ETPU10_B/IRQ3passiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PZ[9]/SD1_1/SAR0_9/SAR2_9/ETPU27_B/EMIOS1_9/SENT1_1passiveSMDcircle0.412×0.412
PZ[8]/SD1_0/SAR0_8/SAR2_8/ETPU28_B/EMIOS1_8/SENT0_1passiveSMDcircle0.412×0.412
VSS_HV_ADV_SDpassiveSMDcircle0.412×0.412
VDD_HV_ADV_SDpowerSMDcircle0.412×0.412
VRC_CTRLpassiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PJ[11]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU31_A/ETPU11_B/EMIOS1_8/RCH5_B/CS1_0/IRQ4/ERROR0passiveSMDcircle0.412×0.412
PJ[12]/INJ_TRIG31/INJ_TRIG31/INJ_TRIG31/INJ_TRIG31/ETPU12_B/EMIOS1_9/CS5_0/IRQ5passiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PZ[11]/SD1_3/SAR0_11/SAR2_11/ETPU25_B/EMIOS1_11passiveSMDcircle0.412×0.412
PZ[10]/SD1_2/SAR0_10/SAR2_10/ETPU26_B/EMIOS1_10/SENT2_1passiveSMDcircle0.412×0.412
VSS_HV_ADR_SDpassiveSMDcircle0.412×0.412
VDD_HV_ADR_SDpowerSMDcircle0.412×0.412
VDD_HV_PMCpowerSMDcircle0.412×0.412
TESTMODEpassiveSMDcircle0.412×0.412
PJ[13]/ETPU13_B/EMIOS1_10/CS4_0/IRQ6passiveSMDcircle0.412×0.412
PJ[14]/ETPU14_B/EMIOS1_11/SCLK_0/IRQ7/ERRORINpassiveSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
PZ[13]/SD1_5/SAR0_13/SAR2_13/ETPU23_B/EMIOS1_13passiveSMDcircle0.412×0.412
PZ[12]/SD1_4/SAR0_12/SAR2_12/ETPU24_B/EMIOS1_12passiveSMDcircle0.412×0.412
PZ[15]/SD1_7/SAR0_15/SAR2_15/ETPU21_B/EMIOS1_15passiveSMDcircle0.412×0.412
PZ[14]/SD1_6/SAR0_14/SAR2_14/ETPU22_B/EMIOS1_14passiveSMDcircle0.412×0.412
VDD_HV_FLApowerSMDcircle0.412×0.412
PJ[15]/ETPU15_B/EMIOS1_12passiveSMDcircle0.412×0.412
PK[0]/ETPU17_B/EMIOS1_13/RCH7_A/CS3_0passiveSMDcircle0.412×0.412
PK[1]/ETPU18_B/RCH7_B/SIN_0passiveSMDcircle0.412×0.412
PY[3]/SD2_3/SAR0_19/SAR3_0/ETPU30_A/ETPU17_BpassiveSMDcircle0.412×0.412
PY[2]/SD2_2/SAR0_18/SAR2_18/ETPU31_A/ETPU18_B/EMIOS0_10/SENT2_0passiveSMDcircle0.412×0.412
PY[1]/SD2_1/SAR0_17/SAR2_17/ETPU19_B/EMIOS0_9/SENT1_0passiveSMDcircle0.412×0.412
PY[0]/SD2_0/SAR0_16/SAR2_16/ETPU20_B/EMIOS0_8/SENT0_0passiveSMDcircle0.412×0.412
PK[2]/ETPU19_B/RCH7_C/SOUT_0passiveSMDcircle0.412×0.412
PK[4]/ETPU20_B/EMIOS0_19/CS2_0passiveSMDcircle0.412×0.412
PK[5]/ETPU21_B/RCH8_A/CS0_0/SS_0passiveSMDcircle0.412×0.412
PK[7]/ETPU0_A/TCRCLK_A/ETPU22_B/EMIOS0_20/RCH8_B/SCLK_2passiveSMDcircle0.412×0.412
PY[7]/SAR0_23/SAR1_3/SAR2_20/ETPU13_B/EMIOS0_13passiveSMDcircle0.412×0.412
PY[6]/SAR0_22/SAR1_2/SAR3_2/ETPU14_B/EMIOS0_12passiveSMDcircle0.412×0.412
PY[5]/SAR0_21/SAR1_1/SAR3_1/ETPU29_A/ETPU15_BpassiveSMDcircle0.412×0.412
PY[4]/SAR0_20/SAR1_0/SAR2_19/ETPU16_B/EMIOS0_11passiveSMDcircle0.412×0.412
PK[8]/ETPU1_A/TCRCLK_A/ETPU23_B/EMIOS0_21/RCH8_C/SIN_2passiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PK[9]/ETPU2_A/ETPU24_B/EMIOS0_22/CS4_2passiveSMDcircle0.412×0.412
PY[10]/SAR0_26/SAR1_6/SAR2_21/ETPU10_B/EMIOS0_15passiveSMDcircle0.412×0.412
PY[9]/SAR0_25/SAR1_5/SAR3_4/ETPU27_A/ETPU11_B/EMIOS0_14passiveSMDcircle0.412×0.412
PY[8]/SAR0_24/SAR1_4/SAR3_3/ETPU28_A/ETPU12_BpassiveSMDcircle0.412×0.412
VDD_HV_IO_MAINpowerSMDcircle0.412×0.412
PK[10]/ETPU3_A/ETPU25_B/EMIOS0_23/RCH7_C/SOUT_2passiveSMDcircle0.412×0.412
PK[11]/ETPU4_A/ETPU26_B/EMIOS1_16/RCH7_B/CS0_2/SS_2passiveSMDcircle0.412×0.412
PY[13]/SAR0_29/SAR1_9/SAR3_7/ETPU7_B/EMIOS0_16passiveSMDcircle0.412×0.412
PY[12]/SAR0_28/SAR1_8/SAR3_6/ETPU25_A/ETPU8_BpassiveSMDcircle0.412×0.412
PY[11]/SAR0_27/SAR1_7/SAR3_5/ETPU26_A/ETPU9_BpassiveSMDcircle0.412×0.412
PK[12]/ETPU5_A/ETPU27_B/EMIOS1_17/RCH7_A/CS1_2/SCLK_1/IRQ5passiveSMDcircle0.412×0.412
PK[13]/ETPU6_A/ETPU28_B/EMIOS1_18/RCH6_A/CS2_2/SIN_2/IRQ4passiveSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
PD[12]/ETPU20_A/ETPU12_B/EMIOS1_20/SOUT_4passiveSMDcircle0.412×0.412
PE[0]/ETPU24_A/ETPU16_B/EMIOS0_8/SCLK_4passiveSMDcircle0.412×0.412
PC[3]/ETPU28_A/ETPU20_B/EMIOS0_11/RCH1_A/CS3_3/FEC_TXD3passiveSMDcircle0.412×0.412
PC[6]/ETPU31_A/ETPU23_B/EMIOS0_14/RCH2_A/CAN2RX/LINM1TX/FEC_TXD0passiveSMDcircle0.412×0.412
PC[9]/ETPU2_A/ETPU26_B/EMIOS0_17/RCH3_A/LINM0RX/SIN_3/MSC0_RX/FEC_RXD2passiveSMDcircle0.412×0.412
PC[13]/ETPU6_A/ETPU30_B/EMIOS0_21/RCH4_C/FEC_RXDVpassiveSMDcircle0.412×0.412
PW[3]/SAR1_31/SAR3_20/ETPU7_A/ETPU31_B/EMIOS0_22/SENT2_0/IRQ1passiveSMDcircle0.412×0.412
PX[8]/SAR1_20/SAR3_15/ETPU16_A/ETPU16_BpassiveSMDcircle0.412×0.412
PX[1]/SAR1_13/SAR2_23/SAR3_10/ETPU3_B/EMIOS0_18passiveSMDcircle0.412×0.412
PX[0]/SAR1_12/SAR3_9/ETPU23_A/ETPU4_BpassiveSMDcircle0.412×0.412
PY[14]/SAR0_30/SAR1_10/SAR3_8/ETPU24_A/ETPU6_BpassiveSMDcircle0.412×0.412
PK[14]/ETPU7_A/ETPU29_B/EMIOS1_19/RCH9_A/CS3_2/IRQ3passiveSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PD[4]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU12_A/ETPU4_B/EMIOS1_12/RCH1_A/CS5_4/IRQ7passiveSMDcircle0.412×0.412
PD[7]/ETPU15_A/ETPU7_B/EMIOS1_15/RCH2_A/CAN3RX/LIN2RXpassiveSMDcircle0.412×0.412
PD[8]/ETPU16_A/ETPU8_B/EMIOS1_16/RCH3_A/CAN3TX/LIN2TX/FEC_MDCpassiveSMDcircle0.412×0.412
PD[11]/ETPU19_A/ETPU11_B/EMIOS1_19/CS0_4/SS_4passiveSMDcircle0.412×0.412
PD[15]/ETPU23_A/ETPU15_B/EMIOS1_23/SIN_4passiveSMDcircle0.412×0.412
PC[2]/ETPU27_A/ETPU19_B/EMIOS0_10/RCH0_C/CS2_3/FEC_TXENpassiveSMDcircle0.412×0.412
PC[5]/ETPU30_A/ETPU22_B/EMIOS0_13/RCH1_C/CS5_3/FEC_TXD1/FEC_COLpassiveSMDcircle0.412×0.412
PC[8]/ETPU1_A/TCRCLK_A/ETPU25_B/EMIOS0_16/RCH2_C/LINM0TX/FEC_RXD1passiveSMDcircle0.412×0.412
PC[12]/ETPU5_A/ETPU29_B/EMIOS0_20/RCH4_B/SCLK_3/FEC_RXCLKpassiveSMDcircle0.412×0.412
PW[2]/SAR1_30/SAR2_31/ETPU8_A/ETPU12_B/EMIOS0_23/SENT1_0/IRQ2passiveSMDcircle0.412×0.412
PX[14]/SAR1_26/SAR2_29/ETPU12_A/ETPU14_B/EMIOS1_22/SENT2_1/IRQ5passiveSMDcircle0.412×0.412
PX[11]/SAR1_23/SAR3_16/ETPU19_BpassiveSMDcircle0.412×0.412
PX[15]/SAR1_27/SAR3_18/ETPU11_A/ETPU23_B/IRQ4passiveSMDcircle0.412×0.412
PX[5]/SAR1_17/SAR3_12/ETPU19_A/ETPU13_BpassiveSMDcircle0.412×0.412
PX[2]/SAR1_14/SAR2_24/ETPU22_A/ETPU2_BpassiveSMDcircle0.412×0.412
VDD_HV_ADV_SARpowerSMDcircle0.412×0.412
PY[15]/SAR0_31/SAR1_11/SAR2_22/ETPU5_B/EMIOS0_17passiveSMDcircle0.412×0.412
VDD_LVpowerSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PD[1]/INJ_TRIG28/INJ_TRIG28/INJ_TRIG28/INJ_TRIG28/ETPU9_A/ETPU1_B/TCRCLK_B/EMIOS1_9/RCH4_A/CAN1TX/LIN1TX/IRQ1passiveSMDcircle0.412×0.412
PD[3]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU11_A/ETPU3_B/EMIOS1_11/RCH6_A/LIN3TX/IRQ6passiveSMDcircle0.412×0.412
PD[6]/ETPU14_A/ETPU6_B/EMIOS1_14/RCH9_A/CS3_4passiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PD[10]/INJ_TRIG29/INJ_TRIG29/INJ_TRIG29/INJ_TRIG29/ETPU18_A/ETPU10_B/EMIOS1_18/RCH5_A/CS1_4/IRQ10passiveSMDcircle0.412×0.412
PD[14]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU22_A/ETPU14_B/EMIOS1_22/RCH5_C/CAN0TX/LIN0TX/IRQ9/CLKOUTpassiveSMDcircle0.412×0.412
PC[1]/ETPU26_A/ETPU18_B/EMIOS0_9/RCH0_B/CS1_3/FEC_TXCLKpassiveSMDcircle0.412×0.412
PC[4]/ETPU29_A/ETPU21_B/EMIOS0_12/RCH1_B/CS4_3/FEC_TXD2passiveSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PC[11]/ETPU4_A/ETPU28_B/EMIOS0_19/RCH3_C/SIN_3/FEC_RXERpassiveSMDcircle0.412×0.412
PW[1]/SAR1_29/SAR2_30/ETPU9_A/ETPU13_B/EMIOS1_23/SENT0_0/IRQ3passiveSMDcircle0.412×0.412
PX[13]/SAR1_25/SAR2_28/ETPU13_A/ETPU15_B/EMIOS1_21/SENT1_1/IRQ6passiveSMDcircle0.412×0.412
PX[10]/SAR1_22/SAR2_27/ETPU14_A/ETPU18_B/EMIOS1_20/SENT0_1passiveSMDcircle0.412×0.412
PX[7]/SAR1_19/SAR3_14/ETPU17_A/ETPU15_BpassiveSMDcircle0.412×0.412
PX[4]/SAR1_16/SAR3_11/ETPU20_A/ETPU0_B/TCRCLK_BpassiveSMDcircle0.412×0.412
VSS_HV_ADR_SARpassiveSMDcircle0.412×0.412
VSS_HV_ADV_SARpassiveSMDcircle0.412×0.412
VDD_HV_ADV_SARpowerSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
VSSgroundSMDcircle0.412×0.412
PD[0]/ETPU8_A/ETPU0_B/TCRCLK_B/EMIOS1_8/RCH0_A/CAN1RX/LIN1RX/IRQ0passiveSMDcircle0.412×0.412
PD[2]/ETPU10_A/ETPU2_B/EMIOS1_10/RCH7_A/LIN3RX/IRQ2passiveSMDcircle0.412×0.412
PD[5]/ETPU13_A/ETPU5_B/EMIOS1_13/RCH8_A/CS4_4passiveSMDcircle0.412×0.412
VDD_HV_IO_MAINpowerSMDcircle0.412×0.412
PD[9]/ETPU17_A/ETPU9_B/EMIOS1_17/CS2_4passiveSMDcircle0.412×0.412
PD[13]/NRML_TRIG/NRML_TRIG/NRML_TRIG/NRML_TRIG/ETPU21_A/ETPU13_B/EMIOS1_21/RCH5_B/CAN0RX/LIN0RX/FEC_MDIO/IRQ8passiveSMDcircle0.412×0.412
PC[0]/ETPU25_A/ETPU17_B/EMIOS0_8/RCH0_A/CS0_3/SS_3/FEC_REF_CLK/FEC_TXCLKpassiveSMDcircle0.412×0.412
VDD_HV_IO_FECpowerSMDcircle0.412×0.412
PC[7]/ETPU0_A/TCRCLK_A/ETPU24_B/EMIOS0_15/RCH2_B/CAN2TX/LINM1RX/MSC1_RX/FEC_RXD0passiveSMDcircle0.412×0.412
PC[10]/ETPU3_A/ETPU27_B/EMIOS0_18/RCH3_B/SOUT_3/FEC_RXD3/FEC_CRS_DVpassiveSMDcircle0.412×0.412
PW[0]/SAR1_28/SAR3_19/ETPU10_A/ETPU24_BpassiveSMDcircle0.412×0.412
PX[12]/SAR1_24/SAR3_17/ETPU20_B/IRQ7passiveSMDcircle0.412×0.412
PX[9]/SAR1_21/SAR2_26/ETPU15_A/ETPU17_BpassiveSMDcircle0.412×0.412
PX[6]/SAR1_18/SAR3_13/ETPU18_A/ETPU14_BpassiveSMDcircle0.412×0.412
PX[3]/SAR1_15/SAR2_25/ETPU21_A/ETPU1_B/TCRCLK_BpassiveSMDcircle0.412×0.412
VDD_HV_ADR_SARpowerSMDcircle0.412×0.412
VSS_HV_ADR_SARpassiveSMDcircle0.412×0.412
VSS_HV_ADV_SARpassiveSMDcircle0.412×0.412

Key Parameters

Frequency
200MHz

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Details

Category
microcontroller
MPN
SPC5745RK1MMT5
Manufacturer
NXP Semicon
Package
MAPBGA-252
Footprint
MAPBGA-252_L17.0-W17.0-P0.80-BL_SPC5746RK1MMT5
JLCPCB
C3219946
LCSC
C3219946
Lifecycle
active
Mounting
SMT
RoHS
Compliant
MSL
MSL 3
ECCN
3A991A2

JLCPCB Stock & Pricing

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