ic

MWCT2D17SHVPB

Symbol
GPIO[18]/eMIOS_1_CH[0]_X/LPUART1_TX/LPSPI1_SOUT/eMIOS_1_CH[16]_X/eMIOS_2_CH[0]_X/EIRQ[0]/TRGMUX_IN12/ADC2_P01GPIO[19]/eMIOS_1_CH[1]_H/LPSPI1_SCK/eMIOS_2_CH[1]_H/LPUART1_RX/EIRQ[1]/TRGMUX_IN13/ADC2_P12GPIO[20]/eMIOS_1_CH[2]_H/LPSPI1_SIN/eMIOS_2_CH[2]_H/EIRQ[2]/TRGMUX_IN14/ADC2_P2/WKPU[59]3GPIO[144]/FCCU_ERR1/LPUART3_TX/LPSPI2_SIN/eMIOS_0_CH[23]_X/LPUART1_RTS/FXIO_D3/TRGMUX_OUT7/FCCU_ERR_IN1/EIRQ[15]/ADC0_P4/WKPU[19]4GPIO[143]/FCCU_ERR0/LPSPI2_SCK/eMIOS_0_CH[22]_X/CMP1_RRT/FXIO_D2/TRGMUX_OUT6/FCCU_ERR_IN0/LPUART1_CTS/LPUART3_RX/EIRQ[14]/ADC0_P35GPIO[21]/LPSPI2_PCS2/eMIOS_1_CH[3]_H/FXIO_D0/LPSPI1_PCS0/eMIOS_2_CH[3]_H/EIRQ[3]/TRGMUX_IN15/ADC2_S126GPIO[97]/LPUART5_TX/eMIOS_0_CH[3]_G/LPSPI3_SCK/eMIOS_0_CH[17]_Y/FXIO_D1/TRGMUX_OUT2/EIRQ[9]/ADC0_P07GPIO[96]/eMIOS_0_CH[2]_G/LPSPI3_SOUT/eMIOS_0_CH[16]_X/FXIO_D0/TRGMUX_OUT1/LPUART5_RX/EIRQ[8]/WKPU[6]/ADC0_P18GPIO[139]/LPUART4_TX/LPSPI2_PCS0/eMIOS_0_CH[1]_G/eMIOS_0_CH[21]_Y/FXIO_D5/TRGMUX_OUT5/EIRQ[10]/WKPU[28]/ADC0_P69GPIO[138]/LPSPI3_SIN/LPSPI2_PCS1/eMIOS_0_CH[20]_Y/CLKOUT_STANDBY/FXIO_D4/TRGMUX_OUT4/LPUART4_RX/EIRQ[9]/ADC0_P510GPIO[141]/eMIOS_1_CH[5]_H/LPSPI2_PCS2/LPSPI2_PCS0/FXIO_D5/EIRQ[12]/VRC_CTRL/ADC1_S1911GPIO[133]/eMIOS_1_CH[5]_H/eMIOS_0_CH[19]_Y/FXIO_D7/LPUART12_RX/EIRQ[5]/ADC2_S8/WKPU[32]12GPIO[132]/LPSPI0_PCS0/LPSPI1_PCS1/eMIOS_1_CH[4]_H/eMIOS_0_CH[18]_Y/LPUART12_TX/FXIO_D6/EIRQ[4]/ADC2_S913GPI[24]/eMIOS_1_CH[7]_H/FXIO_D3/OSC32K_XTAL14GPI[25]/eMIOS_1_CH[8]_X/eMIOS_2_CH[8]_X/FXIO_D2/EIRQ[5]/OSC32K_EXTAL/WKPU[34]15VREFH16VREFL17VDD_HV_A18V2519V1520V1121VSS22EXTAL23VSS24XTAL25GPIO[142]/eMIOS_0_CH[19]_Y/LPUART5_TX/FXIO_D7/EMAC_PPS1/CAN4_RX/EIRQ[13]/WKPU[30]26GPIO[131]/CAN4_TX/eMIOS_0_CH[19]_Y/FXIO_D6/LPUART2_RTS/EMAC_PPS0/CMP0_OUT/LPUART5_RX/EIRQ[3]/TRGMUX_IN627GPIO[27]/FXIO_D5/eMIOS_1_CH[10]_H/EMAC_PPS1/LPUART0_TX/CAN0_TX/eMIOS_2_CH[10]_H28GPIO[140]/CAN5_TX/LPUART2_TX/eMIOS_1_CH[5]_H/EMAC_PPS3/FXIO_D8/EIRQ[11]29GPIO[28]/eMIOS_1_CH[11]_H/LPSPI1_SCK/eMIOS_2_CH[11]_H/CAN0_RX/LPUART0_RX/EIRQ[6]30GPIO[113]/LPSPI5_PCS0/eMIOS_0_CH[18]_Y/EMAC_MII_RMII_MDC/LPSPI3_PCS0/FXIO_D9/EMAC_PPS2/CAN5_RX/LPUART2_RX/EIRQ[24]31GPIO[29]/eMIOS_1_CH[12]_H/EMAC_PPS2/LPUART2_TX/LPSPI1_SIN/eMIOS_2_CH[12]_H32GPIO[30]/eMIOS_1_CH[13]_H/LPSPI1_SOUT/LPSPI0_SOUT/eMIOS_2_CH[13]_H/LPUART2_RX/EIRQ[7]/WKPU[37]33GPIO[112]/eMIOS_0_CH[1]_G/EMAC_MII_RMII_MDIO/LPSPI0_SIN/eMIOS_1_CH[15]_H/LPUART2_RTS/LPUART8_TX/CMP0_IN534GPIO[111]/FXIO_D6/eMIOS_0_CH[0]_X/eMIOS_1_CH[14]_H/LPSPI0_SCK/EMAC_PPS2/SAI1_SYNC/FXIO_D10/CAN3_RX/LPUART2_CTS/LPUART8_RX/EIRQ[31]/CMP0_IN135GPIO[137]/LPSPI5_SOUT/eMIOS_0_CH[7]_G/eMIOS_1_CH[13]_H/CAN3_TX/EMAC_PPS3/EMAC_MII_RMII_TX_EN/FXIO_D11/LPUART2_CTS/EIRQ[8]/CMP0_IN036VSS37VDD_HV_B38GPIO[31]/eMIOS_1_CH[14]_H/FXIO_D0/LPSPI0_PCS1/TRGMUX_OUT839GPIO[110]/LPSPI5_SCK/eMIOS_0_CH[21]_Y/LPUART1_TX/LPI2C0_SCL/EMAC_PPS0/CMP0_RRT/CLKOUT_RUN/SAI1_MCLK/EIRQ[30]40GPIO[109]/LPSPI5_SIN/eMIOS_0_CH[20]_Y/FXIO_D7/LPI2C0_SDA/EMAC_PPS1/SAI1_D0/LPUART1_RX/EIRQ[29]/WKPU[24]41GPIO[50]/LPUART13_TX/eMIOS_1_CH[15]_H/FXIO_D1/LPSPI1_PCS1/eMIOS_2_CH[14]_H/TRGMUX_OUT942GPIO[51]/eMIOS_1_CH[15]_H/FXIO_D2/eMIOS_2_CH[15]_H/TRGMUX_OUT10/LPUART13_RX/WKPU[38]43GPIO[52]/LPUART14_TX/eMIOS_1_CH[16]_X/FXIO_D3/eMIOS_2_CH[16]_X/TRGMUX_OUT1144GPIO[53]/eMIOS_1_CH[17]_Y/FXIO_D4/eMIOS_2_CH[17]_Y/TRGMUX_OUT12/LPUART14_RX/EIRQ[8]/WKPU[39]45GPIO[136]/LPSPI3_PCS1/eMIOS_0_CH[6]_G/LPSPI5_PCS1/FXIO_D12/EMAC_MII_RMII_MDC/SAI1_BCLK/FXIO_D8/EIRQ[7]/CMP0_IN346GPIO[37]/EMAC_MII_RMII_TXD[0]/eMIOS_0_CH[5]_G/LPSPI0_PCS1/LPSPI0_PCS0/CLKOUT_RUN/eMIOS_1_CH[11]_H/EMAC_MII_RMII_MDC/EIRQ[13]/TRGMUX_IN047GPIO[36]/EMAC_MII_RMII_TXD[1]/eMIOS_0_CH[4]_G/LPSPI0_SOUT/EMAC_MII_RMII_MDIO/eMIOS_1_CH[10]_H/EIRQ[12]/TRGMUX_IN148GPIO[67]/eMIOS_0_CH[3]_G/CAN0_TX/LPUART0_TX/QuadSPI_PCSFA/EIRQ[3]/CMP0_IN449GPIO[66]/EMAC_MII_RMII_TXD[1]/eMIOS_0_CH[2]_G/LPSPI3_PCS2/LPSPI0_PCS2/EMAC_MII_RMII_TXD[0]/TRACE_ETM_CLKOUT/QuadSPI_IOFA3/CAN0_RX/LPUART0_RX/EIRQ[2]/CMP0_IN250GPIO[103]/EMAC_MII_RMII_TXD[0]/LPUART2_TX/LPSPI3_PCS3/LPSPI0_PCS3/EMAC_MII_RMII_TXD[1]/TRACE_ETM_D0/QuadSPI_IOFA1/EIRQ[15]/CMP0_IN651GPIO[102]/EMAC_MII_TXD3/eMIOS_1_CH[12]_H/EMAC_MII_RMII_TX_CLK/EMAC_MII_TXD2/FXIO_D13/LPSPI0_PCS0/LPUART2_RX/EIRQ[14]/CMP0_IN752GPIO[101]/EMAC_MII_TXD2/eMIOS_0_CH[19]_Y/eMIOS_0_CH[2]_G/EMAC_MII_TXD3/FXIO_D15/LPSPI0_PCS1/EMAC_MII_RX_CLK/EIRQ[13]/TRGMUX_IN753GPIO[108]/EMAC_MII_RMII_TX_CLK/eMIOS_0_CH[18]_Y/LPUART2_RTS/TRACE_ETM_D1/EMAC_MII_RMII_TX_EN/LPSPI0_SOUT/QuadSPI_IOFA2/LPI2C1_HREQ/EIRQ[28]54GPIO[107]/EMAC_MII_TXD2/eMIOS_0_CH[17]_Y/EMAC_MII_RMII_TX_EN/TRACE_ETM_D2/EMAC_MII_RMII_TX_CLK/LPSPI0_SCK/QuadSPI_IOFA0/LPUART2_CTS/EIRQ[27]55GPIO[106]/EMAC_MII_TXD3/eMIOS_0_CH[16]_X/eMIOS_1_CH[10]_H/TRACE_ETM_D3/LPSPI0_SIN/CLKOUT_RUN/QuadSPI_SCKFA/EMAC_MII_RX_CLK/EIRQ[26]56VDD_HV_B57VSS58V1159V1560GPIO[65]/eMIOS_0_CH[1]_G/FXIO_D5/EMAC_MII_RMII_RXD[1]/eMIOS_0_CH[15]_H/CAN3_RX/EMAC_MII_RMII_RXD[0]/EMAC_MII_RX_CLK/EIRQ[1]61GPIO[64]/CAN3_TX/eMIOS_0_CH[0]_X/EMAC_MII_RMII_RXD[0]/eMIOS_0_CH[14]_H/EMAC_MII_RMII_TX_CLK/EMAC_MII_RMII_RXD[1]/EIRQ[0]62GPIO[105]/EMAC_MII_RXD2/LPI2C1_SCL/FXIO_D0/LPUART6_TX/eMIOS_0_CH[13]_H/FXIO_D10/EMAC_MII_RMII_RXD[0]/EIRQ[25]63GPIO[104]/LPSPI3_SOUT/LPI2C1_SDA/EMAC_MII_RXD3/FXIO_D1/eMIOS_0_CH[12]_H/FXIO_D11/EMAC_MII_RMII_RXD[1]/LPUART6_RX/EIRQ[24]64GPIO[81]/LPSPI3_SCK/CAN2_TX/LPI2C1_SCLS/EMAC_MII_RMII_RX_DV/FXIO_D1465GPIO[80]/LPSPI3_SIN/eMIOS_1_CH[9]_H/eMIOS_2_CH[9]_H/LPI2C1_SDAS/FXIO_D15/LPI2C1_SDA/CAN2_RX/EMAC_MII_RMII_RX_ER/LPUART2_RX66GPIO[54]/CAN1_TX/eMIOS_1_CH[18]_Y/LPSPI3_PCS1/eMIOS_2_CH[18]_Y/LPUART1_TX/FXIO_D15/TRGMUX_OUT13/EMAC_MII_CRS/EIRQ[9]67GPIO[79]/CAN2_TX/eMIOS_0_CH[11]_H/LPSPI2_SCK/ADC0_MA[2]/LPUART2_TX/LCU1_OUT0/LPI2C1_SCL/EMAC_MII_CRS/EMAC_MII_RMII_RX_DV/EMAC_MII_RXD2/EIRQ[23]/TRGMUX_IN868GPIO[55]/ADC1_MA[0]/eMIOS_1_CH[19]_Y/FXIO_D4/eMIOS_2_CH[19]_Y/TRGMUX_OUT14/CAN1_RX/EMAC_MII_COL/LPUART1_RX/EIRQ[10]/WKPU[40]69GPIO[56]/ADC1_MA[1]/eMIOS_1_CH[20]_Y/FXIO_D5/eMIOS_2_CH[20]_Y/EIRQ[11]70GPIO[78]/eMIOS_0_CH[10]_H/LPSPI2_PCS0/ADC0_MA[1]/eMIOS_1_CH[4]_H/LCU1_OUT1/FXIO_D16/CAN2_RX/EMAC_MII_COL/EMAC_MII_RMII_RX_ER/EMAC_MII_RXD3/EIRQ[22]/TRGMUX_IN971GPIO[57]/LPUART15_TX/eMIOS_1_CH[21]_Y/FXIO_D6/eMIOS_2_CH[21]_Y/LPSPI2_PCS0/EIRQ[12]72GPIO[58]/eMIOS_1_CH[22]_X/FXIO_D7/eMIOS_2_CH[22]_X/LPUART15_RX/EIRQ[13]/WKPU[41]73GPIO[35]/LPUART9_TX/eMIOS_0_CH[9]_H/LPSPI2_SOUT/ADC0_MA[0]/CAN4_TX/LCU1_OUT2/FXIO_D17/SAI0_MCLK/EIRQ[11]/TRGMUX_IN274GPIO[59]/LPUART5_TX/eMIOS_1_CH[23]_X/FXIO_D8/eMIOS_2_CH[23]_X/LPSPI2_SOUT75GPIO[60]/ADC1_MA[2]/FXIO_D9/eMIOS_2_CH[10]_H/LPSPI2_SIN/LCU1_OUT11/EMAC_PPS3/LPUART5_RX/EIRQ[14]/WKPU[42]76VDD_HV_B77VSS78GPIO[34]/ADC1_MA[0]/eMIOS_0_CH[8]_X/LPSPI2_SIN/LCU1_OUT3/SAI0_D0/FXIO_D18/CAN4_RX/LPUART9_RX/EIRQ[10]/TRGMUX_IN3/WKPU[8]79GPIO[61]/LPUART6_TX/FXIO_D10/eMIOS_2_CH[11]_H/LPSPI2_SCK/LCU1_OUT10/SAI0_D180GPIO[77]/LPUART10_TX/eMIOS_1_CH[3]_H/eMIOS_0_CH[23]_X/ADC1_MA[1]/FXIO_D16/LCU1_OUT8/SAI0_SYNC/EIRQ[21]81GPIO[82]/FXIO_D6/FXIO_D12/eMIOS_2_CH[12]_H/LCU1_OUT7/SAI0_D2/LPUART6_RX/WKPU[36]82GPIO[76]/ADC1_MA[2]/eMIOS_1_CH[2]_H/eMIOS_0_CH[22]_X/LPSPI2_PCS1/FXIO_D19/LCU1_OUT9/SAI0_BCLK/LPUART10_RX/EIRQ[20]83GPIO[83]/LPUART7_TX/FXIO_D13/eMIOS_2_CH[13]_H/LPSPI2_PCS1/LCU1_OUT6/SAI0_D384GPIO[84]/FXIO_D14/eMIOS_2_CH[14]_H/ADC1_MA[2]/LCU1_OUT5/LPUART7_RX/EIRQ[16]/WKPU[43]85GPIO[85]/FXIO_D15/eMIOS_2_CH[15]_H/ADC1_MA[1]/LCU1_OUT4/EIRQ[17]86GPIO[8]/eMIOS_1_CH[12]_H/LPSPI2_SOUT/FXIO_D6/eMIOS_2_CH[7]_H/LPUART2_RX/EIRQ[16]/WKPU[23]/ADC0_P2172GPIO[9]/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/LPSPI3_PCS0/CMP2_OUT/EIRQ[17]/WKPU[21]/ADC0_P7171GPIO[4]/FXIO_D6/CMP0_OUT/JTAG_TMS/SWD_DIO/EIRQ[4]/ADC1_S15170VDD_HV_A169VSS168GPIO[5]/RESET_b/EIRQ[5]167GPIO[68]/eMIOS_0_CH[8]_X/FXIO_D5/JTAG_TCK/SWD_CLK/EIRQ[4]/CMP1_IN3166GPIO[69]/eMIOS_0_CH[16]_X/FXIO_D4/CMP2_RRT/JTAG_TDI/LPI2C1_HREQ/EIRQ[5]/ADC1_S14165GPIO[154]/eMIOS_1_CH[6]_H/eMIOS_2_CH[6]_H/ADC2_P6164GPIO[128]/LPSPI0_SIN/FXIO_D3/LPUART7_RX/EIRQ[0]/WKPU[26]/ADC1_P2163GPIO[129]/LPSPI0_SCK/FXIO_D2/LPUART7_TX/EIRQ[1]/ADC1_P3162GPIO[10]/eMIOS_0_CH[12]_H/FXIO_D0/JTAG_TDO/TRACEnoETM_SWO/EIRQ[18]161GPIO[11]/CAN1_TX/eMIOS_0_CH[13]_H/eMIOS_1_CH[1]_H/FXIO_D1/CMP0_RRT/LPSPI1_PCS0/EIRQ[19]/ADC1_S10160GPIO[12]/LPSPI1_PCS5/eMIOS_0_CH[14]_H/CLKOUT_STANDBY/FXIO_D9/eMIOS_1_CH[2]_H/CMP1_OUT/CAN1_RX/LPUART11_RX/EIRQ[20]/ADC1_P0159GPIO[153]/eMIOS_1_CH[5]_H/eMIOS_2_CH[5]_H/LPSPI4_SOUT/CAN2_RX/WKPU[58]/ADC2_P7158GPIO[152]/eMIOS_1_CH[4]_H/CAN2_TX/eMIOS_2_CH[4]_H/FXIO_D5/LPSPI4_PCS1/FXIO_D11/ADC2_S13157GPIO[151]/eMIOS_1_CH[3]_H/eMIOS_2_CH[21]_Y/LPSPI4_PCS0/WKPU[57]/ADC2_P5156GPIO[13]/LPSPI1_PCS4/eMIOS_0_CH[15]_H/FXIO_D8/eMIOS_1_CH[3]_H/LPUART11_TX/EIRQ[21]/WKPU[4]/ADC1_P1155GPIO[150]/eMIOS_1_CH[2]_H/eMIOS_2_CH[20]_Y/LPSPI4_SCK/ADC2_P4154GPIO[149]/eMIOS_1_CH[1]_H/eMIOS_2_CH[19]_Y/LPSPI4_SIN/WKPU[56]/ADC2_P3153GPIO[14]/eMIOS_1_CH[4]_H/LPSPI1_PCS3/eMIOS_2_CH[18]_Y/FXIO_D14/LPSPI5_PCS1/EIRQ[22]/ADC1_P4152VDD_HV_A151VSS150V11149V15148GPIO[130]/LPSPI0_SOUT/eMIOS_0_CH[3]_G/eMIOS_1_CH[8]_X/FXIO_D13/ADC0_MA[0]/LPUART1_CTS/LPUART10_RX/EIRQ[2]/WKPU[27]/ADC1_P5147GPIO[134]/LPSPI0_PCS2/LPUART1_RTS/eMIOS_1_CH[14]_H/LPUART10_TX/FXIO_D12/ADC0_MA[1]/EIRQ[6]/ADC1_P6/WKPU[29]146GPIO[15]/eMIOS_0_CH[10]_H/LPSPI0_PCS3/LPSPI2_PCS3/LPSPI5_PCS0/FXIO_D31/LPUART6_RX/EIRQ[23]/ADC1_P7/WKPU[20]145GPIO[146]/FXIO_D4/eMIOS_2_CH[17]_Y/ADC2_S11/WKPU[55]/ADC1_S23144GPIO[16]/LPSPI4_PCS3/eMIOS_0_CH[11]_H/LPSPI1_PCS2/LPSPI0_PCS4/LPUART6_TX/FXIO_D30/EIRQ[4]/ADC1_S13/WKPU[31]143GPIO[145]/FXIO_D5/eMIOS_2_CH[23]_X/ADC2_S10/ADC1_S22142GPIO[70]/LPI2C1_SDA/FXIO_D11/LPSPI1_PCS1/LCU0_OUT7/eMIOS_1_CH[6]_H/LPSPI0_PCS1/ADC0_MA[2]/CAN2_RX/LPUART1_RX/EIRQ[6]/WKPU[3]/ADC1_S18141GPIO[71]/FXIO_D10/LPUART1_TX/LPI2C1_SCL/LCU0_OUT6/eMIOS_1_CH[7]_H/LPSPI0_PCS0/CAN2_TX/LPI2C0_HREQ/EIRQ[7]/WKPU[2]/ADC1_S16140GPIO[127]/FXIO_D6/eMIOS_2_CH[22]_X/LCU0_OUT9/WKPU[53]/ADC2_S14139GPIO[126]/eMIOS_2_CH[16]_X/LCU0_OUT8/LPSPI5_PCS3/ADC2_S15138GPIO[0]/LPSPI4_PCS2/eMIOS_0_CH[17]_Y/LCU0_OUT4/FXIO_D2/eMIOS_1_CH[0]_X/LPSPI0_PCS7/TRGMUX_OUT3/LPUART0_CTS/EIRQ[0]/ADC0_S8/CMP1_IN0137GPIO[125]/eMIOS_2_CH[8]_X/LCU0_OUT3/LPSPI5_PCS2/LPUART15_RX/ADC1_S23/WKPU[52]136GPIO[1]/LPSPI4_PCS1/eMIOS_0_CH[9]_H/LPUART0_RTS/FXIO_D3/LCU0_OUT5/LPSPI0_PCS6/TRGMUX_OUT0/EIRQ[1]/ADC0_S9/CMP1_IN1/WKPU[5]135GPIO[124]/LPUART15_TX/eMIOS_2_CH[0]_X/LCU0_OUT2/LPSPI5_SIN/EIRQ[31]/ADC1_S22134GPIO[40]/LPSPI4_PCS0/eMIOS_1_CH[15]_H/LCU0_OUT11/LPSPI0_PCS5/FXIO_D29/EIRQ[14]/CMP2_IN3/ADC0_X[0]/WKPU[25]133GPIO[123]/eMIOS_2_CH[9]_H/FXIO_D31/LPSPI5_SOUT/LCU0_OUT1/LPUART14_RX/EIRQ[30]/ADC1_S21/WKPU[51]132GPIO[122]/LPUART14_TX/eMIOS_1_CH[23]_X/FXIO_D7/eMIOS_2_CH[7]_H/FXIO_D30/LPSPI5_SCK/LCU0_OUT0/ADC2_S16131GPIO[41]/LPSPI4_SOUT/eMIOS_1_CH[16]_X/LCU0_OUT10/FXIO_D28/LPUART9_RX/EIRQ[15]/CMP2_IN2/ADC0_X[1]/WKPU[17]130GPIO[42]/LPSPI4_SCK/eMIOS_1_CH[17]_Y/LPUART9_TX/LCU0_OUT9/FXIO_D27/EIRQ[24]/CMP2_IN1/ADC0_X[2]129VDD_HV_A128VSS127GPIO[43]/LPSPI4_SIN/eMIOS_1_CH[18]_Y/LCU0_OUT8/FXIO_D26/LPI2C0_HREQ/EIRQ[25]/CMP2_IN0/ADC0_X[3]/WKPU[16]126GPIO[120]/eMIOS_1_CH[21]_Y/FXIO_D29/LCU0_OUT11/HSE_TAMPER_EXTIN0/EIRQ[29]/ADC1_S20125GPIO[2]/FCCU_ERR0/eMIOS_1_CH[19]_Y/FXIO_D4/LCU0_OUT3/LPSPI5_SIN/FCCU_ERR_IN0/LPSPI1_SIN/LPUART0_RX/EIRQ[2]/ADC1_X[0]/WKPU[0]/CMP1_IN2124GPIO[3]/FCCU_ERR1/eMIOS_1_CH[20]_Y/LPSPI1_SCK/LCU0_OUT2/FXIO_D5/LPUART0_TX/LPSPI5_SCK/FCCU_ERR_IN1/EIRQ[3]/ADC1_S17123GPIO[119]/eMIOS_1_CH[20]_Y/FXIO_D28/eMIOS_2_CH[23]_X/HSE_TAMPER_LOOP_OUT0/LCU0_OUT10/EIRQ[28]/WKPU[50]/ADC2_S17122GPIO[98]/LCU0_OUT1/eMIOS_1_CH[21]_Y/LPSPI1_SOUT/FXIO_D4/FXIO_D6/LPUART3_TX/LPSPI5_SOUT/EIRQ[10]/TRGMUX_IN5/WKPU[9]/ADC0_S16121GPIO[99]/eMIOS_1_CH[22]_X/LPSPI1_PCS0/FXIO_D5/FXIO_D7/LCU0_OUT0/LPUART3_RX/EIRQ[11]/TRGMUX_IN4/NMI_b/WKPU[1]/ADC0_S10120GPIO[100]/eMIOS_1_CH[23]_X/LPSPI1_PCS1/LCU0_OUT6/LPSPI5_PCS0/EIRQ[12]/ADC0_S19/WKPU[22]119GPIO[118]/eMIOS_1_CH[19]_Y/FXIO_D27/eMIOS_2_CH[22]_X/LCU0_OUT5/EIRQ[27]/ADC2_S18118GPIO[44]/LPSPI3_PCS3/eMIOS_0_CH[0]_X/LCU0_OUT2/FXIO_D25/LPUART8_RX/EIRQ[26]/ADC1_X[1]/WKPU[12]117GPIO[45]/LPSPI3_PCS2/eMIOS_0_CH[1]_G/FXIO_D8/LCU0_OUT3/LPUART8_TX/FXIO_D24/EIRQ[27]/ADC0_S8/ADC1_S8/ADC2_S8/WKPU[11]116GPIO[117]/eMIOS_1_CH[18]_Y/FXIO_D26/eMIOS_2_CH[8]_X/LCU0_OUT4/EIRQ[26]/ADC0_S23115GPIO[46]/eMIOS_0_CH[2]_G/LPSPI1_SCK/LCU0_OUT7/FXIO_D23/LPUART7_RX/EIRQ[28]/ADC0_S9/ADC1_S9/ADC2_S9114GPIO[47]/eMIOS_0_CH[3]_G/LPSPI1_SIN/LPUART7_TX/FXIO_D22/EIRQ[29]/ADC1_S11/WKPU[33]113GPIO[48]/eMIOS_0_CH[4]_G/LPSPI1_SOUT/LPUART4_TX/FXIO_D21/EIRQ[30]/WKPU[13]/ADC1_S12112GPIO[116]/eMIOS_1_CH[17]_Y/FXIO_D25/eMIOS_2_CH[0]_X/LPSPI1_PCS2/LPSPI3_SIN/EIRQ[25]/ADC0_S22/WKPU[54]111GPIO[49]/eMIOS_0_CH[5]_G/LPSPI1_PCS3/eMIOS_1_CH[7]_H/LPSPI3_PCS0/FXIO_D20/LPUART4_RX/EIRQ[31]/ADC1_X[2]/WKPU[14]110GPIO[17]/eMIOS_0_CH[6]_G/LPUART4_TX/LPSPI3_SOUT/FXIO_D19/ADC2_S19109VDD_HV_A108VSS107V11106V15105GPIO[135]/eMIOS_0_CH[7]_G/LPSPI3_SCK/FXIO_D11/LPUART4_RX/ADC2_S20104GPIO[95]/eMIOS_1_CH[14]_H/FXIO_D1/eMIOS_2_CH[6]_H/FXIO_D24/CAN4_RX/ADC2_S21/WKPU[49]103GPIO[6]/LPSPI1_PCS1/eMIOS_1_CH[13]_H/FXIO_D19/LPSPI3_PCS1/CAN0_RX/LPUART1_CTS/LPUART3_RX/EIRQ[6]/WKPU[15]/ADC0_S18102GPIO[94]/CAN4_TX/eMIOS_1_CH[12]_H/FXIO_D0/eMIOS_2_CH[5]_H/FXIO_D23101GPIO[7]/LPUART3_TX/LPSPI0_PCS1/eMIOS_1_CH[11]_H/CAN0_TX/LPUART1_RTS/FXIO_D9/EIRQ[7]/ADC0_S11100GPIO[93]/eMIOS_1_CH[10]_H/FXIO_D22/eMIOS_2_CH[4]_H/LPI2C1_SDA/FXIO_D3/CAN3_RX/EIRQ[23]/WKPU[47]99GPIO[72]/LPI2C0_SCL/CAN1_TX/eMIOS_1_CH[9]_H/LCU1_OUT7/LPSPI0_SCK/FXIO_D12/LPUART0_CTS/LPUART1_RX/EIRQ[16]/ADC0_S1298GPIO[73]/LPI2C0_SDA/LPUART1_TX/LPUART0_RTS/eMIOS_1_CH[8]_X/LCU1_OUT6/LPSPI0_SIN/FXIO_D13/CAN1_RX/EIRQ[17]/ADC0_S13/WKPU[10]97GPIO[92]/CAN3_TX/eMIOS_1_CH[7]_H/FXIO_D21/FXIO_D2/LPI2C1_SCL/LCU1_OUT896GPIO[32]/LPI2C0_SDAS/FXIO_D14/LPSPI0_PCS0/eMIOS_0_CH[3]_G/LCU1_OUT5/eMIOS_1_CH[6]_H/HSE_TAMPER_LOOP_OUT0/CAN0_RX/LPUART0_RX/EIRQ[8]/ADC1_S14/ADC0_S14/WKPU[7]95GPIO[33]/LPI2C0_SCLS/LPUART0_TX/LPSPI0_SOUT/eMIOS_0_CH[7]_G/CAN0_TX/eMIOS_1_CH[5]_H/LCU1_OUT4/HSE_TAMPER_EXTIN0/EIRQ[9]/ADC1_S15/ADC0_S1594GPIO[91]/CAN5_TX/eMIOS_1_CH[4]_H/FXIO_D20/eMIOS_2_CH[3]_H/ADC1_MA[0]/LCU1_OUT3/LPSPI4_SCK/LPUART13_RX/EIRQ[22]93GPIO[74]/eMIOS_0_CH[6]_G/LPUART11_TX/CAN5_TX/LPSPI2_PCS1/LPSPI4_PCS0/LCU1_OUT11/eMIOS_1_CH[0]_X/EIRQ[18]/TRGMUX_IN11/ADC1_X[3]92GPIO[90]/LPUART13_TX/eMIOS_1_CH[3]_H/FXIO_D19/eMIOS_2_CH[2]_H/LCU1_OUT9/LPSPI4_SIN/CAN5_RX/EIRQ[21]/ADC0_S21/WKPU[48]91GPIO[75]/eMIOS_1_CH[1]_H/FXIO_D15/LPSPI4_SOUT/FXIO_D19/LCU1_OUT10/CAN5_RX/LPUART11_RX/EIRQ[19]/TRGMUX_IN10/WKPU[18]/ADC0_S1790GPIO[89]/eMIOS_1_CH[1]_H/FXIO_D18/eMIOS_2_CH[1]_H/LPSPI4_PCS1/LCU1_OUT2/LPUART12_RX/EIRQ[20]/ADC0_S20/WKPU[45]89GPIO[88]/LPUART12_TX/eMIOS_1_CH[0]_X/FXIO_D17/eMIOS_2_CH[0]_X/LCU1_OUT1/TRGMUX_OUT15/EIRQ[19]/ADC2_S22/WKPU[46]88GPIO[87]/FXIO_D16/LCU1_OUT0/EIRQ[18]/WKPU[44]/ADC2_S2387
Footprint
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172
3D Model
No 3D preview

Pin Map

PinNameTypeMountShapeWidth × Height (mm)
GPIO[18]/eMIOS_1_CH[0]_X/LPUART1_TX/LPSPI1_SOUT/eMIOS_1_CH[16]_X/eMIOS_2_CH[0]_X/EIRQ[0]/TRGMUX_IN12/ADC2_P0passiveSMDoval1.4×0.3
GPIO[19]/eMIOS_1_CH[1]_H/LPSPI1_SCK/eMIOS_2_CH[1]_H/LPUART1_RX/EIRQ[1]/TRGMUX_IN13/ADC2_P1passiveSMDoval1.4×0.3
GPIO[20]/eMIOS_1_CH[2]_H/LPSPI1_SIN/eMIOS_2_CH[2]_H/EIRQ[2]/TRGMUX_IN14/ADC2_P2/WKPU[59]passiveSMDoval1.4×0.3
GPIO[144]/FCCU_ERR1/LPUART3_TX/LPSPI2_SIN/eMIOS_0_CH[23]_X/LPUART1_RTS/FXIO_D3/TRGMUX_OUT7/FCCU_ERR_IN1/EIRQ[15]/ADC0_P4/WKPU[19]passiveSMDoval1.4×0.3
GPIO[143]/FCCU_ERR0/LPSPI2_SCK/eMIOS_0_CH[22]_X/CMP1_RRT/FXIO_D2/TRGMUX_OUT6/FCCU_ERR_IN0/LPUART1_CTS/LPUART3_RX/EIRQ[14]/ADC0_P3passiveSMDoval1.4×0.3
GPIO[21]/LPSPI2_PCS2/eMIOS_1_CH[3]_H/FXIO_D0/LPSPI1_PCS0/eMIOS_2_CH[3]_H/EIRQ[3]/TRGMUX_IN15/ADC2_S12passiveSMDoval1.4×0.3
GPIO[97]/LPUART5_TX/eMIOS_0_CH[3]_G/LPSPI3_SCK/eMIOS_0_CH[17]_Y/FXIO_D1/TRGMUX_OUT2/EIRQ[9]/ADC0_P0passiveSMDoval1.4×0.3
GPIO[96]/eMIOS_0_CH[2]_G/LPSPI3_SOUT/eMIOS_0_CH[16]_X/FXIO_D0/TRGMUX_OUT1/LPUART5_RX/EIRQ[8]/WKPU[6]/ADC0_P1passiveSMDoval1.4×0.3
GPIO[139]/LPUART4_TX/LPSPI2_PCS0/eMIOS_0_CH[1]_G/eMIOS_0_CH[21]_Y/FXIO_D5/TRGMUX_OUT5/EIRQ[10]/WKPU[28]/ADC0_P6passiveSMDoval1.4×0.3
GPIO[138]/LPSPI3_SIN/LPSPI2_PCS1/eMIOS_0_CH[20]_Y/CLKOUT_STANDBY/FXIO_D4/TRGMUX_OUT4/LPUART4_RX/EIRQ[9]/ADC0_P5passiveSMDoval1.4×0.3
GPIO[141]/eMIOS_1_CH[5]_H/LPSPI2_PCS2/LPSPI2_PCS0/FXIO_D5/EIRQ[12]/VRC_CTRL/ADC1_S19passiveSMDoval1.4×0.3
GPIO[133]/eMIOS_1_CH[5]_H/eMIOS_0_CH[19]_Y/FXIO_D7/LPUART12_RX/EIRQ[5]/ADC2_S8/WKPU[32]passiveSMDoval1.4×0.3
GPIO[132]/LPSPI0_PCS0/LPSPI1_PCS1/eMIOS_1_CH[4]_H/eMIOS_0_CH[18]_Y/LPUART12_TX/FXIO_D6/EIRQ[4]/ADC2_S9passiveSMDoval1.4×0.3
GPI[24]/eMIOS_1_CH[7]_H/FXIO_D3/OSC32K_XTALpassiveSMDoval1.4×0.3
GPI[25]/eMIOS_1_CH[8]_X/eMIOS_2_CH[8]_X/FXIO_D2/EIRQ[5]/OSC32K_EXTAL/WKPU[34]passiveSMDoval1.4×0.3
VREFHpassiveSMDoval1.4×0.3
VREFLpassiveSMDoval1.4×0.3
VDD_HV_ApowerSMDoval1.4×0.3
V25passiveSMDoval1.4×0.3
V15passiveSMDoval1.4×0.3
V11passiveSMDoval1.4×0.3
VSSgroundSMDoval1.4×0.3
EXTALpassiveSMDoval1.4×0.3
VSSgroundSMDoval1.4×0.3
XTALpassiveSMDoval1.4×0.3
GPIO[142]/eMIOS_0_CH[19]_Y/LPUART5_TX/FXIO_D7/EMAC_PPS1/CAN4_RX/EIRQ[13]/WKPU[30]passiveSMDoval1.4×0.3
GPIO[131]/CAN4_TX/eMIOS_0_CH[19]_Y/FXIO_D6/LPUART2_RTS/EMAC_PPS0/CMP0_OUT/LPUART5_RX/EIRQ[3]/TRGMUX_IN6passiveSMDoval1.4×0.3
GPIO[27]/FXIO_D5/eMIOS_1_CH[10]_H/EMAC_PPS1/LPUART0_TX/CAN0_TX/eMIOS_2_CH[10]_HpassiveSMDoval1.4×0.3
GPIO[140]/CAN5_TX/LPUART2_TX/eMIOS_1_CH[5]_H/EMAC_PPS3/FXIO_D8/EIRQ[11]passiveSMDoval1.4×0.3
GPIO[28]/eMIOS_1_CH[11]_H/LPSPI1_SCK/eMIOS_2_CH[11]_H/CAN0_RX/LPUART0_RX/EIRQ[6]passiveSMDoval1.4×0.3
GPIO[113]/LPSPI5_PCS0/eMIOS_0_CH[18]_Y/EMAC_MII_RMII_MDC/LPSPI3_PCS0/FXIO_D9/EMAC_PPS2/CAN5_RX/LPUART2_RX/EIRQ[24]passiveSMDoval1.4×0.3
GPIO[29]/eMIOS_1_CH[12]_H/EMAC_PPS2/LPUART2_TX/LPSPI1_SIN/eMIOS_2_CH[12]_HpassiveSMDoval1.4×0.3
GPIO[30]/eMIOS_1_CH[13]_H/LPSPI1_SOUT/LPSPI0_SOUT/eMIOS_2_CH[13]_H/LPUART2_RX/EIRQ[7]/WKPU[37]passiveSMDoval1.4×0.3
GPIO[112]/eMIOS_0_CH[1]_G/EMAC_MII_RMII_MDIO/LPSPI0_SIN/eMIOS_1_CH[15]_H/LPUART2_RTS/LPUART8_TX/CMP0_IN5passiveSMDoval1.4×0.3
GPIO[111]/FXIO_D6/eMIOS_0_CH[0]_X/eMIOS_1_CH[14]_H/LPSPI0_SCK/EMAC_PPS2/SAI1_SYNC/FXIO_D10/CAN3_RX/LPUART2_CTS/LPUART8_RX/EIRQ[31]/CMP0_IN1passiveSMDoval1.4×0.3
GPIO[137]/LPSPI5_SOUT/eMIOS_0_CH[7]_G/eMIOS_1_CH[13]_H/CAN3_TX/EMAC_PPS3/EMAC_MII_RMII_TX_EN/FXIO_D11/LPUART2_CTS/EIRQ[8]/CMP0_IN0passiveSMDoval1.4×0.3
VSSgroundSMDoval1.4×0.3
VDD_HV_BpowerSMDoval1.4×0.3
GPIO[31]/eMIOS_1_CH[14]_H/FXIO_D0/LPSPI0_PCS1/TRGMUX_OUT8passiveSMDoval1.4×0.3
GPIO[110]/LPSPI5_SCK/eMIOS_0_CH[21]_Y/LPUART1_TX/LPI2C0_SCL/EMAC_PPS0/CMP0_RRT/CLKOUT_RUN/SAI1_MCLK/EIRQ[30]passiveSMDoval1.4×0.3
GPIO[109]/LPSPI5_SIN/eMIOS_0_CH[20]_Y/FXIO_D7/LPI2C0_SDA/EMAC_PPS1/SAI1_D0/LPUART1_RX/EIRQ[29]/WKPU[24]passiveSMDoval1.4×0.3
GPIO[50]/LPUART13_TX/eMIOS_1_CH[15]_H/FXIO_D1/LPSPI1_PCS1/eMIOS_2_CH[14]_H/TRGMUX_OUT9passiveSMDoval1.4×0.3
GPIO[51]/eMIOS_1_CH[15]_H/FXIO_D2/eMIOS_2_CH[15]_H/TRGMUX_OUT10/LPUART13_RX/WKPU[38]passiveSMDoval1.4×0.3
GPIO[52]/LPUART14_TX/eMIOS_1_CH[16]_X/FXIO_D3/eMIOS_2_CH[16]_X/TRGMUX_OUT11passiveSMDoval0.3×1.4
GPIO[53]/eMIOS_1_CH[17]_Y/FXIO_D4/eMIOS_2_CH[17]_Y/TRGMUX_OUT12/LPUART14_RX/EIRQ[8]/WKPU[39]passiveSMDoval0.3×1.4
GPIO[136]/LPSPI3_PCS1/eMIOS_0_CH[6]_G/LPSPI5_PCS1/FXIO_D12/EMAC_MII_RMII_MDC/SAI1_BCLK/FXIO_D8/EIRQ[7]/CMP0_IN3passiveSMDoval0.3×1.4
GPIO[37]/EMAC_MII_RMII_TXD[0]/eMIOS_0_CH[5]_G/LPSPI0_PCS1/LPSPI0_PCS0/CLKOUT_RUN/eMIOS_1_CH[11]_H/EMAC_MII_RMII_MDC/EIRQ[13]/TRGMUX_IN0passiveSMDoval0.3×1.4
GPIO[36]/EMAC_MII_RMII_TXD[1]/eMIOS_0_CH[4]_G/LPSPI0_SOUT/EMAC_MII_RMII_MDIO/eMIOS_1_CH[10]_H/EIRQ[12]/TRGMUX_IN1passiveSMDoval0.3×1.4
GPIO[67]/eMIOS_0_CH[3]_G/CAN0_TX/LPUART0_TX/QuadSPI_PCSFA/EIRQ[3]/CMP0_IN4passiveSMDoval0.3×1.4
GPIO[66]/EMAC_MII_RMII_TXD[1]/eMIOS_0_CH[2]_G/LPSPI3_PCS2/LPSPI0_PCS2/EMAC_MII_RMII_TXD[0]/TRACE_ETM_CLKOUT/QuadSPI_IOFA3/CAN0_RX/LPUART0_RX/EIRQ[2]/CMP0_IN2passiveSMDoval0.3×1.4
GPIO[103]/EMAC_MII_RMII_TXD[0]/LPUART2_TX/LPSPI3_PCS3/LPSPI0_PCS3/EMAC_MII_RMII_TXD[1]/TRACE_ETM_D0/QuadSPI_IOFA1/EIRQ[15]/CMP0_IN6passiveSMDoval0.3×1.4
GPIO[102]/EMAC_MII_TXD3/eMIOS_1_CH[12]_H/EMAC_MII_RMII_TX_CLK/EMAC_MII_TXD2/FXIO_D13/LPSPI0_PCS0/LPUART2_RX/EIRQ[14]/CMP0_IN7passiveSMDoval0.3×1.4
GPIO[101]/EMAC_MII_TXD2/eMIOS_0_CH[19]_Y/eMIOS_0_CH[2]_G/EMAC_MII_TXD3/FXIO_D15/LPSPI0_PCS1/EMAC_MII_RX_CLK/EIRQ[13]/TRGMUX_IN7passiveSMDoval0.3×1.4
GPIO[108]/EMAC_MII_RMII_TX_CLK/eMIOS_0_CH[18]_Y/LPUART2_RTS/TRACE_ETM_D1/EMAC_MII_RMII_TX_EN/LPSPI0_SOUT/QuadSPI_IOFA2/LPI2C1_HREQ/EIRQ[28]passiveSMDoval0.3×1.4
GPIO[107]/EMAC_MII_TXD2/eMIOS_0_CH[17]_Y/EMAC_MII_RMII_TX_EN/TRACE_ETM_D2/EMAC_MII_RMII_TX_CLK/LPSPI0_SCK/QuadSPI_IOFA0/LPUART2_CTS/EIRQ[27]passiveSMDoval0.3×1.4
GPIO[106]/EMAC_MII_TXD3/eMIOS_0_CH[16]_X/eMIOS_1_CH[10]_H/TRACE_ETM_D3/LPSPI0_SIN/CLKOUT_RUN/QuadSPI_SCKFA/EMAC_MII_RX_CLK/EIRQ[26]passiveSMDoval0.3×1.4
VDD_HV_BpowerSMDoval0.3×1.4
VSSgroundSMDoval0.3×1.4
V11passiveSMDoval0.3×1.4
V15passiveSMDoval0.3×1.4
GPIO[65]/eMIOS_0_CH[1]_G/FXIO_D5/EMAC_MII_RMII_RXD[1]/eMIOS_0_CH[15]_H/CAN3_RX/EMAC_MII_RMII_RXD[0]/EMAC_MII_RX_CLK/EIRQ[1]passiveSMDoval0.3×1.4
GPIO[64]/CAN3_TX/eMIOS_0_CH[0]_X/EMAC_MII_RMII_RXD[0]/eMIOS_0_CH[14]_H/EMAC_MII_RMII_TX_CLK/EMAC_MII_RMII_RXD[1]/EIRQ[0]passiveSMDoval0.3×1.4
GPIO[105]/EMAC_MII_RXD2/LPI2C1_SCL/FXIO_D0/LPUART6_TX/eMIOS_0_CH[13]_H/FXIO_D10/EMAC_MII_RMII_RXD[0]/EIRQ[25]passiveSMDoval0.3×1.4
GPIO[104]/LPSPI3_SOUT/LPI2C1_SDA/EMAC_MII_RXD3/FXIO_D1/eMIOS_0_CH[12]_H/FXIO_D11/EMAC_MII_RMII_RXD[1]/LPUART6_RX/EIRQ[24]passiveSMDoval0.3×1.4
GPIO[81]/LPSPI3_SCK/CAN2_TX/LPI2C1_SCLS/EMAC_MII_RMII_RX_DV/FXIO_D14passiveSMDoval0.3×1.4
GPIO[80]/LPSPI3_SIN/eMIOS_1_CH[9]_H/eMIOS_2_CH[9]_H/LPI2C1_SDAS/FXIO_D15/LPI2C1_SDA/CAN2_RX/EMAC_MII_RMII_RX_ER/LPUART2_RXpassiveSMDoval0.3×1.4
GPIO[54]/CAN1_TX/eMIOS_1_CH[18]_Y/LPSPI3_PCS1/eMIOS_2_CH[18]_Y/LPUART1_TX/FXIO_D15/TRGMUX_OUT13/EMAC_MII_CRS/EIRQ[9]passiveSMDoval0.3×1.4
GPIO[79]/CAN2_TX/eMIOS_0_CH[11]_H/LPSPI2_SCK/ADC0_MA[2]/LPUART2_TX/LCU1_OUT0/LPI2C1_SCL/EMAC_MII_CRS/EMAC_MII_RMII_RX_DV/EMAC_MII_RXD2/EIRQ[23]/TRGMUX_IN8passiveSMDoval0.3×1.4
GPIO[55]/ADC1_MA[0]/eMIOS_1_CH[19]_Y/FXIO_D4/eMIOS_2_CH[19]_Y/TRGMUX_OUT14/CAN1_RX/EMAC_MII_COL/LPUART1_RX/EIRQ[10]/WKPU[40]passiveSMDoval0.3×1.4
GPIO[56]/ADC1_MA[1]/eMIOS_1_CH[20]_Y/FXIO_D5/eMIOS_2_CH[20]_Y/EIRQ[11]passiveSMDoval0.3×1.4
GPIO[78]/eMIOS_0_CH[10]_H/LPSPI2_PCS0/ADC0_MA[1]/eMIOS_1_CH[4]_H/LCU1_OUT1/FXIO_D16/CAN2_RX/EMAC_MII_COL/EMAC_MII_RMII_RX_ER/EMAC_MII_RXD3/EIRQ[22]/TRGMUX_IN9passiveSMDoval0.3×1.4
GPIO[57]/LPUART15_TX/eMIOS_1_CH[21]_Y/FXIO_D6/eMIOS_2_CH[21]_Y/LPSPI2_PCS0/EIRQ[12]passiveSMDoval0.3×1.4
GPIO[58]/eMIOS_1_CH[22]_X/FXIO_D7/eMIOS_2_CH[22]_X/LPUART15_RX/EIRQ[13]/WKPU[41]passiveSMDoval0.3×1.4
GPIO[35]/LPUART9_TX/eMIOS_0_CH[9]_H/LPSPI2_SOUT/ADC0_MA[0]/CAN4_TX/LCU1_OUT2/FXIO_D17/SAI0_MCLK/EIRQ[11]/TRGMUX_IN2passiveSMDoval0.3×1.4
GPIO[59]/LPUART5_TX/eMIOS_1_CH[23]_X/FXIO_D8/eMIOS_2_CH[23]_X/LPSPI2_SOUTpassiveSMDoval0.3×1.4
GPIO[60]/ADC1_MA[2]/FXIO_D9/eMIOS_2_CH[10]_H/LPSPI2_SIN/LCU1_OUT11/EMAC_PPS3/LPUART5_RX/EIRQ[14]/WKPU[42]passiveSMDoval0.3×1.4
VDD_HV_BpowerSMDoval0.3×1.4
VSSgroundSMDoval0.3×1.4
GPIO[34]/ADC1_MA[0]/eMIOS_0_CH[8]_X/LPSPI2_SIN/LCU1_OUT3/SAI0_D0/FXIO_D18/CAN4_RX/LPUART9_RX/EIRQ[10]/TRGMUX_IN3/WKPU[8]passiveSMDoval0.3×1.4
GPIO[61]/LPUART6_TX/FXIO_D10/eMIOS_2_CH[11]_H/LPSPI2_SCK/LCU1_OUT10/SAI0_D1passiveSMDoval0.3×1.4
GPIO[77]/LPUART10_TX/eMIOS_1_CH[3]_H/eMIOS_0_CH[23]_X/ADC1_MA[1]/FXIO_D16/LCU1_OUT8/SAI0_SYNC/EIRQ[21]passiveSMDoval0.3×1.4
GPIO[82]/FXIO_D6/FXIO_D12/eMIOS_2_CH[12]_H/LCU1_OUT7/SAI0_D2/LPUART6_RX/WKPU[36]passiveSMDoval0.3×1.4
GPIO[76]/ADC1_MA[2]/eMIOS_1_CH[2]_H/eMIOS_0_CH[22]_X/LPSPI2_PCS1/FXIO_D19/LCU1_OUT9/SAI0_BCLK/LPUART10_RX/EIRQ[20]passiveSMDoval0.3×1.4
GPIO[83]/LPUART7_TX/FXIO_D13/eMIOS_2_CH[13]_H/LPSPI2_PCS1/LCU1_OUT6/SAI0_D3passiveSMDoval0.3×1.4
GPIO[84]/FXIO_D14/eMIOS_2_CH[14]_H/ADC1_MA[2]/LCU1_OUT5/LPUART7_RX/EIRQ[16]/WKPU[43]passiveSMDoval0.3×1.4
GPIO[85]/FXIO_D15/eMIOS_2_CH[15]_H/ADC1_MA[1]/LCU1_OUT4/EIRQ[17]passiveSMDoval0.3×1.4
GPIO[87]/FXIO_D16/LCU1_OUT0/EIRQ[18]/WKPU[44]/ADC2_S23passiveSMDoval1.4×0.3
GPIO[88]/LPUART12_TX/eMIOS_1_CH[0]_X/FXIO_D17/eMIOS_2_CH[0]_X/LCU1_OUT1/TRGMUX_OUT15/EIRQ[19]/ADC2_S22/WKPU[46]passiveSMDoval1.4×0.3
GPIO[89]/eMIOS_1_CH[1]_H/FXIO_D18/eMIOS_2_CH[1]_H/LPSPI4_PCS1/LCU1_OUT2/LPUART12_RX/EIRQ[20]/ADC0_S20/WKPU[45]passiveSMDoval1.4×0.3
GPIO[75]/eMIOS_1_CH[1]_H/FXIO_D15/LPSPI4_SOUT/FXIO_D19/LCU1_OUT10/CAN5_RX/LPUART11_RX/EIRQ[19]/TRGMUX_IN10/WKPU[18]/ADC0_S17passiveSMDoval1.4×0.3
GPIO[90]/LPUART13_TX/eMIOS_1_CH[3]_H/FXIO_D19/eMIOS_2_CH[2]_H/LCU1_OUT9/LPSPI4_SIN/CAN5_RX/EIRQ[21]/ADC0_S21/WKPU[48]passiveSMDoval1.4×0.3
GPIO[74]/eMIOS_0_CH[6]_G/LPUART11_TX/CAN5_TX/LPSPI2_PCS1/LPSPI4_PCS0/LCU1_OUT11/eMIOS_1_CH[0]_X/EIRQ[18]/TRGMUX_IN11/ADC1_X[3]passiveSMDoval1.4×0.3
GPIO[91]/CAN5_TX/eMIOS_1_CH[4]_H/FXIO_D20/eMIOS_2_CH[3]_H/ADC1_MA[0]/LCU1_OUT3/LPSPI4_SCK/LPUART13_RX/EIRQ[22]passiveSMDoval1.4×0.3
GPIO[33]/LPI2C0_SCLS/LPUART0_TX/LPSPI0_SOUT/eMIOS_0_CH[7]_G/CAN0_TX/eMIOS_1_CH[5]_H/LCU1_OUT4/HSE_TAMPER_EXTIN0/EIRQ[9]/ADC1_S15/ADC0_S15passiveSMDoval1.4×0.3
GPIO[32]/LPI2C0_SDAS/FXIO_D14/LPSPI0_PCS0/eMIOS_0_CH[3]_G/LCU1_OUT5/eMIOS_1_CH[6]_H/HSE_TAMPER_LOOP_OUT0/CAN0_RX/LPUART0_RX/EIRQ[8]/ADC1_S14/ADC0_S14/WKPU[7]passiveSMDoval1.4×0.3
GPIO[92]/CAN3_TX/eMIOS_1_CH[7]_H/FXIO_D21/FXIO_D2/LPI2C1_SCL/LCU1_OUT8passiveSMDoval1.4×0.3
GPIO[73]/LPI2C0_SDA/LPUART1_TX/LPUART0_RTS/eMIOS_1_CH[8]_X/LCU1_OUT6/LPSPI0_SIN/FXIO_D13/CAN1_RX/EIRQ[17]/ADC0_S13/WKPU[10]passiveSMDoval1.4×0.3
GPIO[72]/LPI2C0_SCL/CAN1_TX/eMIOS_1_CH[9]_H/LCU1_OUT7/LPSPI0_SCK/FXIO_D12/LPUART0_CTS/LPUART1_RX/EIRQ[16]/ADC0_S12passiveSMDoval1.4×0.3
GPIO[93]/eMIOS_1_CH[10]_H/FXIO_D22/eMIOS_2_CH[4]_H/LPI2C1_SDA/FXIO_D3/CAN3_RX/EIRQ[23]/WKPU[47]passiveSMDoval1.4×0.3
GPIO[7]/LPUART3_TX/LPSPI0_PCS1/eMIOS_1_CH[11]_H/CAN0_TX/LPUART1_RTS/FXIO_D9/EIRQ[7]/ADC0_S11passiveSMDoval1.4×0.3
GPIO[94]/CAN4_TX/eMIOS_1_CH[12]_H/FXIO_D0/eMIOS_2_CH[5]_H/FXIO_D23passiveSMDoval1.4×0.3
GPIO[6]/LPSPI1_PCS1/eMIOS_1_CH[13]_H/FXIO_D19/LPSPI3_PCS1/CAN0_RX/LPUART1_CTS/LPUART3_RX/EIRQ[6]/WKPU[15]/ADC0_S18passiveSMDoval1.4×0.3
GPIO[95]/eMIOS_1_CH[14]_H/FXIO_D1/eMIOS_2_CH[6]_H/FXIO_D24/CAN4_RX/ADC2_S21/WKPU[49]passiveSMDoval1.4×0.3
GPIO[135]/eMIOS_0_CH[7]_G/LPSPI3_SCK/FXIO_D11/LPUART4_RX/ADC2_S20passiveSMDoval1.4×0.3
V15passiveSMDoval1.4×0.3
V11passiveSMDoval1.4×0.3
VSSgroundSMDoval1.4×0.3
VDD_HV_ApowerSMDoval1.4×0.3
GPIO[17]/eMIOS_0_CH[6]_G/LPUART4_TX/LPSPI3_SOUT/FXIO_D19/ADC2_S19passiveSMDoval1.4×0.3
GPIO[49]/eMIOS_0_CH[5]_G/LPSPI1_PCS3/eMIOS_1_CH[7]_H/LPSPI3_PCS0/FXIO_D20/LPUART4_RX/EIRQ[31]/ADC1_X[2]/WKPU[14]passiveSMDoval1.4×0.3
GPIO[116]/eMIOS_1_CH[17]_Y/FXIO_D25/eMIOS_2_CH[0]_X/LPSPI1_PCS2/LPSPI3_SIN/EIRQ[25]/ADC0_S22/WKPU[54]passiveSMDoval1.4×0.3
GPIO[48]/eMIOS_0_CH[4]_G/LPSPI1_SOUT/LPUART4_TX/FXIO_D21/EIRQ[30]/WKPU[13]/ADC1_S12passiveSMDoval1.4×0.3
GPIO[47]/eMIOS_0_CH[3]_G/LPSPI1_SIN/LPUART7_TX/FXIO_D22/EIRQ[29]/ADC1_S11/WKPU[33]passiveSMDoval1.4×0.3
GPIO[46]/eMIOS_0_CH[2]_G/LPSPI1_SCK/LCU0_OUT7/FXIO_D23/LPUART7_RX/EIRQ[28]/ADC0_S9/ADC1_S9/ADC2_S9passiveSMDoval1.4×0.3
GPIO[117]/eMIOS_1_CH[18]_Y/FXIO_D26/eMIOS_2_CH[8]_X/LCU0_OUT4/EIRQ[26]/ADC0_S23passiveSMDoval1.4×0.3
GPIO[45]/LPSPI3_PCS2/eMIOS_0_CH[1]_G/FXIO_D8/LCU0_OUT3/LPUART8_TX/FXIO_D24/EIRQ[27]/ADC0_S8/ADC1_S8/ADC2_S8/WKPU[11]passiveSMDoval1.4×0.3
GPIO[44]/LPSPI3_PCS3/eMIOS_0_CH[0]_X/LCU0_OUT2/FXIO_D25/LPUART8_RX/EIRQ[26]/ADC1_X[1]/WKPU[12]passiveSMDoval1.4×0.3
GPIO[118]/eMIOS_1_CH[19]_Y/FXIO_D27/eMIOS_2_CH[22]_X/LCU0_OUT5/EIRQ[27]/ADC2_S18passiveSMDoval1.4×0.3
GPIO[100]/eMIOS_1_CH[23]_X/LPSPI1_PCS1/LCU0_OUT6/LPSPI5_PCS0/EIRQ[12]/ADC0_S19/WKPU[22]passiveSMDoval1.4×0.3
GPIO[99]/eMIOS_1_CH[22]_X/LPSPI1_PCS0/FXIO_D5/FXIO_D7/LCU0_OUT0/LPUART3_RX/EIRQ[11]/TRGMUX_IN4/NMI_b/WKPU[1]/ADC0_S10passiveSMDoval1.4×0.3
GPIO[98]/LCU0_OUT1/eMIOS_1_CH[21]_Y/LPSPI1_SOUT/FXIO_D4/FXIO_D6/LPUART3_TX/LPSPI5_SOUT/EIRQ[10]/TRGMUX_IN5/WKPU[9]/ADC0_S16passiveSMDoval1.4×0.3
GPIO[119]/eMIOS_1_CH[20]_Y/FXIO_D28/eMIOS_2_CH[23]_X/HSE_TAMPER_LOOP_OUT0/LCU0_OUT10/EIRQ[28]/WKPU[50]/ADC2_S17passiveSMDoval1.4×0.3
GPIO[3]/FCCU_ERR1/eMIOS_1_CH[20]_Y/LPSPI1_SCK/LCU0_OUT2/FXIO_D5/LPUART0_TX/LPSPI5_SCK/FCCU_ERR_IN1/EIRQ[3]/ADC1_S17passiveSMDoval1.4×0.3
GPIO[2]/FCCU_ERR0/eMIOS_1_CH[19]_Y/FXIO_D4/LCU0_OUT3/LPSPI5_SIN/FCCU_ERR_IN0/LPSPI1_SIN/LPUART0_RX/EIRQ[2]/ADC1_X[0]/WKPU[0]/CMP1_IN2passiveSMDoval1.4×0.3
GPIO[120]/eMIOS_1_CH[21]_Y/FXIO_D29/LCU0_OUT11/HSE_TAMPER_EXTIN0/EIRQ[29]/ADC1_S20passiveSMDoval1.4×0.3
GPIO[43]/LPSPI4_SIN/eMIOS_1_CH[18]_Y/LCU0_OUT8/FXIO_D26/LPI2C0_HREQ/EIRQ[25]/CMP2_IN0/ADC0_X[3]/WKPU[16]passiveSMDoval1.4×0.3
VSSgroundSMDoval1.4×0.3
VDD_HV_ApowerSMDoval1.4×0.3
GPIO[42]/LPSPI4_SCK/eMIOS_1_CH[17]_Y/LPUART9_TX/LCU0_OUT9/FXIO_D27/EIRQ[24]/CMP2_IN1/ADC0_X[2]passiveSMDoval1.4×0.3
GPIO[41]/LPSPI4_SOUT/eMIOS_1_CH[16]_X/LCU0_OUT10/FXIO_D28/LPUART9_RX/EIRQ[15]/CMP2_IN2/ADC0_X[1]/WKPU[17]passiveSMDoval0.3×1.4
GPIO[122]/LPUART14_TX/eMIOS_1_CH[23]_X/FXIO_D7/eMIOS_2_CH[7]_H/FXIO_D30/LPSPI5_SCK/LCU0_OUT0/ADC2_S16passiveSMDoval0.3×1.4
GPIO[123]/eMIOS_2_CH[9]_H/FXIO_D31/LPSPI5_SOUT/LCU0_OUT1/LPUART14_RX/EIRQ[30]/ADC1_S21/WKPU[51]passiveSMDoval0.3×1.4
GPIO[40]/LPSPI4_PCS0/eMIOS_1_CH[15]_H/LCU0_OUT11/LPSPI0_PCS5/FXIO_D29/EIRQ[14]/CMP2_IN3/ADC0_X[0]/WKPU[25]passiveSMDoval0.3×1.4
GPIO[124]/LPUART15_TX/eMIOS_2_CH[0]_X/LCU0_OUT2/LPSPI5_SIN/EIRQ[31]/ADC1_S22passiveSMDoval0.3×1.4
GPIO[1]/LPSPI4_PCS1/eMIOS_0_CH[9]_H/LPUART0_RTS/FXIO_D3/LCU0_OUT5/LPSPI0_PCS6/TRGMUX_OUT0/EIRQ[1]/ADC0_S9/CMP1_IN1/WKPU[5]passiveSMDoval0.3×1.4
GPIO[125]/eMIOS_2_CH[8]_X/LCU0_OUT3/LPSPI5_PCS2/LPUART15_RX/ADC1_S23/WKPU[52]passiveSMDoval0.3×1.4
GPIO[0]/LPSPI4_PCS2/eMIOS_0_CH[17]_Y/LCU0_OUT4/FXIO_D2/eMIOS_1_CH[0]_X/LPSPI0_PCS7/TRGMUX_OUT3/LPUART0_CTS/EIRQ[0]/ADC0_S8/CMP1_IN0passiveSMDoval0.3×1.4
GPIO[126]/eMIOS_2_CH[16]_X/LCU0_OUT8/LPSPI5_PCS3/ADC2_S15passiveSMDoval0.3×1.4
GPIO[127]/FXIO_D6/eMIOS_2_CH[22]_X/LCU0_OUT9/WKPU[53]/ADC2_S14passiveSMDoval0.3×1.4
GPIO[71]/FXIO_D10/LPUART1_TX/LPI2C1_SCL/LCU0_OUT6/eMIOS_1_CH[7]_H/LPSPI0_PCS0/CAN2_TX/LPI2C0_HREQ/EIRQ[7]/WKPU[2]/ADC1_S16passiveSMDoval0.3×1.4
GPIO[70]/LPI2C1_SDA/FXIO_D11/LPSPI1_PCS1/LCU0_OUT7/eMIOS_1_CH[6]_H/LPSPI0_PCS1/ADC0_MA[2]/CAN2_RX/LPUART1_RX/EIRQ[6]/WKPU[3]/ADC1_S18passiveSMDoval0.3×1.4
GPIO[145]/FXIO_D5/eMIOS_2_CH[23]_X/ADC2_S10/ADC1_S22passiveSMDoval0.3×1.4
GPIO[16]/LPSPI4_PCS3/eMIOS_0_CH[11]_H/LPSPI1_PCS2/LPSPI0_PCS4/LPUART6_TX/FXIO_D30/EIRQ[4]/ADC1_S13/WKPU[31]passiveSMDoval0.3×1.4
GPIO[146]/FXIO_D4/eMIOS_2_CH[17]_Y/ADC2_S11/WKPU[55]/ADC1_S23passiveSMDoval0.3×1.4
GPIO[15]/eMIOS_0_CH[10]_H/LPSPI0_PCS3/LPSPI2_PCS3/LPSPI5_PCS0/FXIO_D31/LPUART6_RX/EIRQ[23]/ADC1_P7/WKPU[20]passiveSMDoval0.3×1.4
GPIO[134]/LPSPI0_PCS2/LPUART1_RTS/eMIOS_1_CH[14]_H/LPUART10_TX/FXIO_D12/ADC0_MA[1]/EIRQ[6]/ADC1_P6/WKPU[29]passiveSMDoval0.3×1.4
GPIO[130]/LPSPI0_SOUT/eMIOS_0_CH[3]_G/eMIOS_1_CH[8]_X/FXIO_D13/ADC0_MA[0]/LPUART1_CTS/LPUART10_RX/EIRQ[2]/WKPU[27]/ADC1_P5passiveSMDoval0.3×1.4
V15passiveSMDoval0.3×1.4
V11passiveSMDoval0.3×1.4
VSSgroundSMDoval0.3×1.4
VDD_HV_ApowerSMDoval0.3×1.4
GPIO[14]/eMIOS_1_CH[4]_H/LPSPI1_PCS3/eMIOS_2_CH[18]_Y/FXIO_D14/LPSPI5_PCS1/EIRQ[22]/ADC1_P4passiveSMDoval0.3×1.4
GPIO[149]/eMIOS_1_CH[1]_H/eMIOS_2_CH[19]_Y/LPSPI4_SIN/WKPU[56]/ADC2_P3passiveSMDoval0.3×1.4
GPIO[150]/eMIOS_1_CH[2]_H/eMIOS_2_CH[20]_Y/LPSPI4_SCK/ADC2_P4passiveSMDoval0.3×1.4
GPIO[13]/LPSPI1_PCS4/eMIOS_0_CH[15]_H/FXIO_D8/eMIOS_1_CH[3]_H/LPUART11_TX/EIRQ[21]/WKPU[4]/ADC1_P1passiveSMDoval0.3×1.4
GPIO[151]/eMIOS_1_CH[3]_H/eMIOS_2_CH[21]_Y/LPSPI4_PCS0/WKPU[57]/ADC2_P5passiveSMDoval0.3×1.4
GPIO[152]/eMIOS_1_CH[4]_H/CAN2_TX/eMIOS_2_CH[4]_H/FXIO_D5/LPSPI4_PCS1/FXIO_D11/ADC2_S13passiveSMDoval0.3×1.4
GPIO[153]/eMIOS_1_CH[5]_H/eMIOS_2_CH[5]_H/LPSPI4_SOUT/CAN2_RX/WKPU[58]/ADC2_P7passiveSMDoval0.3×1.4
GPIO[12]/LPSPI1_PCS5/eMIOS_0_CH[14]_H/CLKOUT_STANDBY/FXIO_D9/eMIOS_1_CH[2]_H/CMP1_OUT/CAN1_RX/LPUART11_RX/EIRQ[20]/ADC1_P0passiveSMDoval0.3×1.4
GPIO[11]/CAN1_TX/eMIOS_0_CH[13]_H/eMIOS_1_CH[1]_H/FXIO_D1/CMP0_RRT/LPSPI1_PCS0/EIRQ[19]/ADC1_S10passiveSMDoval0.3×1.4
GPIO[10]/eMIOS_0_CH[12]_H/FXIO_D0/JTAG_TDO/TRACEnoETM_SWO/EIRQ[18]passiveSMDoval0.3×1.4
GPIO[129]/LPSPI0_SCK/FXIO_D2/LPUART7_TX/EIRQ[1]/ADC1_P3passiveSMDoval0.3×1.4
GPIO[128]/LPSPI0_SIN/FXIO_D3/LPUART7_RX/EIRQ[0]/WKPU[26]/ADC1_P2passiveSMDoval0.3×1.4
GPIO[154]/eMIOS_1_CH[6]_H/eMIOS_2_CH[6]_H/ADC2_P6passiveSMDoval0.3×1.4
GPIO[69]/eMIOS_0_CH[16]_X/FXIO_D4/CMP2_RRT/JTAG_TDI/LPI2C1_HREQ/EIRQ[5]/ADC1_S14passiveSMDoval0.3×1.4
GPIO[68]/eMIOS_0_CH[8]_X/FXIO_D5/JTAG_TCK/SWD_CLK/EIRQ[4]/CMP1_IN3passiveSMDoval0.3×1.4
GPIO[5]/RESET_b/EIRQ[5]passiveSMDoval0.3×1.4
VSSgroundSMDoval0.3×1.4
VDD_HV_ApowerSMDoval0.3×1.4
GPIO[4]/FXIO_D6/CMP0_OUT/JTAG_TMS/SWD_DIO/EIRQ[4]/ADC1_S15passiveSMDoval0.3×1.4
GPIO[9]/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/LPSPI3_PCS0/CMP2_OUT/EIRQ[17]/WKPU[21]/ADC0_P7passiveSMDoval0.3×1.4
GPIO[8]/eMIOS_1_CH[12]_H/LPSPI2_SOUT/FXIO_D6/eMIOS_2_CH[7]_H/LPUART2_RX/EIRQ[16]/WKPU[23]/ADC0_P2passiveSMDoval0.3×1.4

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Details

Category
ic
MPN
MWCT2D17SHVPB
Manufacturer
NXP Semicon
Package
-
Footprint
QFP-172_L16.0-W16.0-P0.65-LS19.0-TL
JLCPCB
C20234272
LCSC
C20234272
Lifecycle
active
Mounting
SMT
RoHS
Compliant
ECCN
5A992C

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