microcontroller

LKS32MC452FPCT8

Symbol
P0_11/MCPWM1_CH1N/UART1_RXD/SPI0_DI/SCL1/TIM4_CH1/EFLS_DAT[3]/CMP4_IP0/TDI/5VT/FLT1P0_12/MCPWM1_CH1P/UART1_TXD/SPI0_DO/SDA1/TIM4_CH0/CAN_TMR/EFLS_CSN/CMP4_IP1/SWCLK/TCLK/5VT/FLT2P0_13/MCPWM1_CH2N/UART0_TXD/SPI1_CSN/TIM4_CH0/CAN_TX/CMP4_IP2/TDO/5VT/FLT/EXTI6/WAKE43P0_14/CLK/MCPWM1_CH2P/UART0_RXD/SPI1_DI/SCL0/CAN_RX/CMP4_IP3/EXTI74P1_2/MCPWM0_CH0P/SPI0_CSN5SWV/P1_4/MCPWM0_CH1P/SCL1/TIM3_CH0/QEP1_CH0/CAN_TMR/5VT6P1_5/MCPWM0_CH2N/UART1_RXD/SPI0_DI/SCL1/TIM4_CH1/QEP3_Z/CAN_TX/5VT/EXTI97P1_6/MCPWM0_CH2P/UART1_TXD/SPI0_DO/SDA1/TIM4_CH0/CAN_RX/5VT8P1_8/MCPWM0_CH3P/UART2_RXD/SPI1_CLK/TIM0_CH0/QEP0_CH0/QEP2_Z/CAN_TMR/5VT/FLT9P1_10/MCPWM0_BKIN1/UART2_RXD/SPI1_DI/SCL0/TIM0_CH0/QEP0_CH0/TIM2_CH1/QEP0_CH1/ADC_TRIGGER1/CAN_RX/5VT/FLT10P1_13/MCPWM1_CH3P/SPI0_CLK/TIM1_CH1/QEP1_CH1/ADC_TRIGGER0/OPA4_IN11P1_14/MCPWM1_CH2N/SPI0_CSN/QEP1_Z/TIM2_CH0/QEP0_CH0/OPA4_IP12P2_0/MCPWM1_CH1N/TIM1_CH0/QEP1_CH0/CAN_RX/EFLS_DAT[0]/FLT/EXTI1313P2_1/MCPWM1_CH1P/TIM1_CH0/QEP1_CH0/ADC_TRIGGER0/CAN_TX/EFLS_DAT[1]/FLT/EXTI1414P2_2/MCPWM1_BKIN0/EFLS_DAT[2]/5VT/EXTI1515PGND16LO417LO518LO619VCC20VS621HO622VB623VS524HO525VB526VS427HO428VB429NC30GND31PGND32VCC33LO334LO235LO136VB337VS338HO339VS240P0_10/MCPWM1_CH0P/SPI0_CSN/TIM1_CH1/QEP1_CH1/EFLS_DAT[2]/CMP4_IN/SWDIO/TMS/5VT/FLT80P0_8/QEP1_Z/EFLS_DAT[0]/OSC_IN79P0_7/OSC_OUT78P0_6/RST_n/5VT77P0_5/CMP5_OUT/HALL1_IN0/MCPWM0_BKIN3/UART0_TXD/SPI0_CLK/SCL0/TIM0_CH1/QEP0_CH1/QEP2_Z/ADC_TRIGGER0/ADC2_CH12/CMP5_IP3/5VT/FLT/EXTI5/WAKE376P0_4/HALL1_IN1/MCPWM1_BKIN0/UART0_RXD/SPI0_DO/SDA0/TIM0_CH0/QEP0_CH0/QEP3_Z/ADC_TRIGGER1/CAN_TMR/ADC2_CH13/CMP5_IP2/5VT/FLT/EXTI4/WAKE275P0_2/CMP5_OUT/MCPWM1_BKIN3/UART0_TXD/CAN_RX/CMP5_IP0/5VT/FLT/EXTI2/WAKE074P0_1/MCPWM1_BKIN2/UART0_RXD/SPI0_CSN/TIM4_CH1/CAN_TX/5VT/EXTI173P4_14/CLK/HALL0_IN1/UART2_TXD/SPI1_DO/SDA0/TIM1_CH1/QEP1_CH1/TIM2_CH0/QEP0_CH0/ADC_TRIGGER2/CAN_RX/EFLS_DAT[1]/ADC0_CH9/CMP0_IP2/5VT/FLT72VSS3371AVDD70AVDD69P4_10/HALL1_IN0/TIM3_CH0/QEP1_CH0/QEP1_CH0/CMP1_IP1/P4_12/CMP1_OUT/HALL1_IN2/UART0_RXD/TIM3_CH0/QEP1_CH0/EFLS_CLK/ADC0_CH12/CMP1_IP368P4_9/CMP1_OUT/TIM3_CH1/QEP1_CH1/CMP1_IP0/5VT67P4_8/CLK/ADC1_CH6/CMP1_IN66P4_7/ADC1_CH7/DAC1_OUT65P4_6/MCPWM0_CH1N/EFLS_CLK/ADC1_CH8/OPAx_OUT1/LDO1264P4_1/MCPWM0_CH3N/UART0_TXD/SDA0/TIM0_CH1/QEP0_CH1/EFLS_DAT[1]/ADC1_CH10/5VT/FLT/EXTI3063P4_0/QEP0_Z/EFLS_DAT[0]/OPA0_IP/EXTI2962P3_15/TIM0_CH0/QEP0_CH0/OPA0_IN/EXTI2861P3_14/OPA1_IP/ADC2_CH4/EXTI2760P3_13/OPA1_IN/ADC2_CH5/EXTI2659P3_11/MCPWM0_BKIN2/ADC2_CH7/OPAx_OUT0/REF/EXTI2458P3_10/MCPWM0_BKIN1/OPA2_IP/ADC2_CH57P3_9/MCPWM0_BKIN0/TIM0_CH1/QEP0_CH1/OPA2_IN/ADC2_CH956P3_8/MCPWM1_BKIN1/TIM4_CH0/ADC_TRIGGER0/EFLS_CLK/OPA3_IP/ADC2_CH10/EXTI2355P3_7/CMP2_OUT/MCPWM1_BKIN0/TIM4_CH1/ADC_TRIGGER1/CAN_RX/OPA3_IN/ADC2_CH11/CMP2_IN/FLT/EXTI2254P3_5/HALL0_IN1/MCPWM1_BKIN2/UART1_RXD/SPI0_DO/TIM1_CH0/QEP1_CH0/QEP1_CH0/CAN_TMR/EFLS_DAT[3]/ADC1_CH11/CMP2_IP2/5VT/P3_6/HALL0_IN2/MCPWM1_BKIN3/UART1_TXD/SPI0_DI/TIM1_CH1/QEP1_CH1/ADC_TRIGGER2/CAN_TX/EFLS_CSN/CMP2_IP3/5VT53P3_4/HALL0_IN0/SPI0_CLK/TIM1_CH1/QEP1_CH1/EFLS_DAT[2]/ADC1_CH12/DAC0_OUT/CMP2_IP1/5VT52P3_3/CMP2_OUT/SPI0_CSN/TIM0_CH1/QEP0_CH1/EFLS_DAT[1]/ADC1_CH13/CMP2_IP0/FLT/EXTI2151P3_1/HALL1_IN1/MCPWM0_BKIN3/SDA0/QEP0_Z/TIM3_CH0/QEP1_CH0/ADC0_CH13/CMP3_IP2/5VT50P2_15/CMP3_OUT/HALL0_IN0/MCPWM0_BKIN0/UART2_RXD/TIM1_CH0/QEP1_CH0/QEP1_CH0/EFLS_CLK/CMP3_IP0/5VT/EXTI19/P3_0/HALL1_IN2/MCPWM0_CH2N/QEP3_Z/ADC0_CH14/CMP3_IP1/5VT49GND48NC47NC46VB145HO144VS143VB242HO241
Footprint
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980
3D Model

Pin Map

PinNameTypeMountShapeWidth × Height (mm)
P0_11/MCPWM1_CH1N/UART1_RXD/SPI0_DI/SCL1/TIM4_CH1/EFLS_DAT[3]/CMP4_IP0/TDI/5VT/FLTpassiveSMDrect0.224×1.46
P0_12/MCPWM1_CH1P/UART1_TXD/SPI0_DO/SDA1/TIM4_CH0/CAN_TMR/EFLS_CSN/CMP4_IP1/SWCLK/TCLK/5VT/FLTpassiveSMDrect0.224×1.46
P0_13/MCPWM1_CH2N/UART0_TXD/SPI1_CSN/TIM4_CH0/CAN_TX/CMP4_IP2/TDO/5VT/FLT/EXTI6/WAKE4passiveSMDrect0.224×1.46
P0_14/CLK/MCPWM1_CH2P/UART0_RXD/SPI1_DI/SCL0/CAN_RX/CMP4_IP3/EXTI7passiveSMDrect0.224×1.46
P1_2/MCPWM0_CH0P/SPI0_CSNpassiveSMDrect0.224×1.46
SWV/P1_4/MCPWM0_CH1P/SCL1/TIM3_CH0/QEP1_CH0/CAN_TMR/5VTpassiveSMDrect0.224×1.46
P1_5/MCPWM0_CH2N/UART1_RXD/SPI0_DI/SCL1/TIM4_CH1/QEP3_Z/CAN_TX/5VT/EXTI9passiveSMDrect0.224×1.46
P1_6/MCPWM0_CH2P/UART1_TXD/SPI0_DO/SDA1/TIM4_CH0/CAN_RX/5VTpassiveSMDrect0.224×1.46
P1_8/MCPWM0_CH3P/UART2_RXD/SPI1_CLK/TIM0_CH0/QEP0_CH0/QEP2_Z/CAN_TMR/5VT/FLTpassiveSMDrect0.224×1.46
P1_10/MCPWM0_BKIN1/UART2_RXD/SPI1_DI/SCL0/TIM0_CH0/QEP0_CH0/TIM2_CH1/QEP0_CH1/ADC_TRIGGER1/CAN_RX/5VT/FLTpassiveSMDrect0.224×1.46
P1_13/MCPWM1_CH3P/SPI0_CLK/TIM1_CH1/QEP1_CH1/ADC_TRIGGER0/OPA4_INpassiveSMDrect0.224×1.46
P1_14/MCPWM1_CH2N/SPI0_CSN/QEP1_Z/TIM2_CH0/QEP0_CH0/OPA4_IPpassiveSMDrect0.224×1.46
P2_0/MCPWM1_CH1N/TIM1_CH0/QEP1_CH0/CAN_RX/EFLS_DAT[0]/FLT/EXTI13passiveSMDrect0.224×1.46
P2_1/MCPWM1_CH1P/TIM1_CH0/QEP1_CH0/ADC_TRIGGER0/CAN_TX/EFLS_DAT[1]/FLT/EXTI14passiveSMDrect0.224×1.46
P2_2/MCPWM1_BKIN0/EFLS_DAT[2]/5VT/EXTI15passiveSMDrect0.224×1.46
PGNDgroundSMDrect0.224×1.46
LO4passiveSMDrect0.224×1.46
LO5passiveSMDrect0.224×1.46
LO6passiveSMDrect0.224×1.46
VCCpowerSMDrect0.224×1.46
VS6passiveSMDrect1.46×0.224
HO6passiveSMDrect1.46×0.224
VB6passiveSMDrect1.46×0.224
VS5passiveSMDrect1.46×0.224
HO5passiveSMDrect1.46×0.224
VB5passiveSMDrect1.46×0.224
VS4passiveSMDrect1.46×0.224
HO4passiveSMDrect1.46×0.224
VB4passiveSMDrect1.46×0.224
NCncSMDrect1.46×0.224
GNDgroundSMDrect1.46×0.224
PGNDgroundSMDrect1.46×0.224
VCCpowerSMDrect1.46×0.224
LO3passiveSMDrect1.46×0.224
LO2passiveSMDrect1.46×0.224
LO1passiveSMDrect1.46×0.224
VB3passiveSMDrect1.46×0.224
VS3passiveSMDrect1.46×0.224
HO3passiveSMDrect1.46×0.224
VS2passiveSMDrect1.46×0.224
HO2passiveSMDrect0.224×1.46
VB2passiveSMDrect0.224×1.46
VS1passiveSMDrect0.224×1.46
HO1passiveSMDrect0.224×1.46
VB1passiveSMDrect0.224×1.46
NCncSMDrect0.224×1.46
NCncSMDrect0.224×1.46
GNDgroundSMDrect0.224×1.46
P2_15/CMP3_OUT/HALL0_IN0/MCPWM0_BKIN0/UART2_RXD/TIM1_CH0/QEP1_CH0/QEP1_CH0/EFLS_CLK/CMP3_IP0/5VT/EXTI19/P3_0/HALL1_IN2/MCPWM0_CH2N/QEP3_Z/ADC0_CH14/CMP3_IP1/5VTpassiveSMDrect0.224×1.46
P3_1/HALL1_IN1/MCPWM0_BKIN3/SDA0/QEP0_Z/TIM3_CH0/QEP1_CH0/ADC0_CH13/CMP3_IP2/5VTpassiveSMDrect0.224×1.46
P3_3/CMP2_OUT/SPI0_CSN/TIM0_CH1/QEP0_CH1/EFLS_DAT[1]/ADC1_CH13/CMP2_IP0/FLT/EXTI21passiveSMDrect0.224×1.46
P3_4/HALL0_IN0/SPI0_CLK/TIM1_CH1/QEP1_CH1/EFLS_DAT[2]/ADC1_CH12/DAC0_OUT/CMP2_IP1/5VTpassiveSMDrect0.224×1.46
P3_5/HALL0_IN1/MCPWM1_BKIN2/UART1_RXD/SPI0_DO/TIM1_CH0/QEP1_CH0/QEP1_CH0/CAN_TMR/EFLS_DAT[3]/ADC1_CH11/CMP2_IP2/5VT/P3_6/HALL0_IN2/MCPWM1_BKIN3/UART1_TXD/SPI0_DI/TIM1_CH1/QEP1_CH1/ADC_TRIGGER2/CAN_TX/EFLS_CSN/CMP2_IP3/5VTpassiveSMDrect0.224×1.46
P3_7/CMP2_OUT/MCPWM1_BKIN0/TIM4_CH1/ADC_TRIGGER1/CAN_RX/OPA3_IN/ADC2_CH11/CMP2_IN/FLT/EXTI22passiveSMDrect0.224×1.46
P3_8/MCPWM1_BKIN1/TIM4_CH0/ADC_TRIGGER0/EFLS_CLK/OPA3_IP/ADC2_CH10/EXTI23passiveSMDrect0.224×1.46
P3_9/MCPWM0_BKIN0/TIM0_CH1/QEP0_CH1/OPA2_IN/ADC2_CH9passiveSMDrect0.224×1.46
P3_10/MCPWM0_BKIN1/OPA2_IP/ADC2_CHpassiveSMDrect0.224×1.46
P3_11/MCPWM0_BKIN2/ADC2_CH7/OPAx_OUT0/REF/EXTI24passiveSMDrect0.224×1.46
P3_13/OPA1_IN/ADC2_CH5/EXTI26passiveSMDrect0.224×1.46
P3_14/OPA1_IP/ADC2_CH4/EXTI27passiveSMDrect0.224×1.46
P3_15/TIM0_CH0/QEP0_CH0/OPA0_IN/EXTI28passiveSMDrect1.46×0.224
P4_0/QEP0_Z/EFLS_DAT[0]/OPA0_IP/EXTI29passiveSMDrect1.46×0.224
P4_1/MCPWM0_CH3N/UART0_TXD/SDA0/TIM0_CH1/QEP0_CH1/EFLS_DAT[1]/ADC1_CH10/5VT/FLT/EXTI30passiveSMDrect1.46×0.224
P4_6/MCPWM0_CH1N/EFLS_CLK/ADC1_CH8/OPAx_OUT1/LDO12passiveSMDrect1.46×0.224
P4_7/ADC1_CH7/DAC1_OUTpassiveSMDrect1.46×0.224
P4_8/CLK/ADC1_CH6/CMP1_INpassiveSMDrect1.46×0.224
P4_9/CMP1_OUT/TIM3_CH1/QEP1_CH1/CMP1_IP0/5VTpassiveSMDrect1.46×0.224
P4_10/HALL1_IN0/TIM3_CH0/QEP1_CH0/QEP1_CH0/CMP1_IP1/P4_12/CMP1_OUT/HALL1_IN2/UART0_RXD/TIM3_CH0/QEP1_CH0/EFLS_CLK/ADC0_CH12/CMP1_IP3passiveSMDrect1.46×0.224
AVDDpowerSMDrect1.46×0.224
AVDDpowerSMDrect1.46×0.224
VSS33passiveSMDrect1.46×0.224
P4_14/CLK/HALL0_IN1/UART2_TXD/SPI1_DO/SDA0/TIM1_CH1/QEP1_CH1/TIM2_CH0/QEP0_CH0/ADC_TRIGGER2/CAN_RX/EFLS_DAT[1]/ADC0_CH9/CMP0_IP2/5VT/FLTpassiveSMDrect1.46×0.224
P0_1/MCPWM1_BKIN2/UART0_RXD/SPI0_CSN/TIM4_CH1/CAN_TX/5VT/EXTI1passiveSMDrect1.46×0.224
P0_2/CMP5_OUT/MCPWM1_BKIN3/UART0_TXD/CAN_RX/CMP5_IP0/5VT/FLT/EXTI2/WAKE0passiveSMDrect1.46×0.224
P0_4/HALL1_IN1/MCPWM1_BKIN0/UART0_RXD/SPI0_DO/SDA0/TIM0_CH0/QEP0_CH0/QEP3_Z/ADC_TRIGGER1/CAN_TMR/ADC2_CH13/CMP5_IP2/5VT/FLT/EXTI4/WAKE2passiveSMDrect1.46×0.224
P0_5/CMP5_OUT/HALL1_IN0/MCPWM0_BKIN3/UART0_TXD/SPI0_CLK/SCL0/TIM0_CH1/QEP0_CH1/QEP2_Z/ADC_TRIGGER0/ADC2_CH12/CMP5_IP3/5VT/FLT/EXTI5/WAKE3passiveSMDrect1.46×0.224
P0_6/RST_n/5VTpassiveSMDrect1.46×0.224
P0_7/OSC_OUTpassiveSMDrect1.46×0.224
P0_8/QEP1_Z/EFLS_DAT[0]/OSC_INpassiveSMDrect1.46×0.224
P0_10/MCPWM1_CH0P/SPI0_CSN/TIM1_CH1/QEP1_CH1/EFLS_DAT[2]/CMP4_IN/SWDIO/TMS/5VT/FLTpassiveSMDrect1.46×0.224

Key Parameters

Frequency
192MHz

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Details

Category
microcontroller
MPN
LKS32MC452FPCT8
Manufacturer
LINKOSEMI
Package
LQFP-80(10x10)
Footprint
LQFP-80_L10.0-W10.0-P0.40-LS12.0-BL
JLCPCB
C22469872
LCSC
C22469872
Lifecycle
active
Mounting
SMT
RoHS
Compliant
MSL
MSL 3
ECCN
-

JLCPCB Stock & Pricing

In Stock(119 pcs)
1-9 pcs$3.5840
10-29 pcs$3.0458
30-159 pcs$2.7261
160-479 pcs$2.4032
480-959 pcs$2.2555
960+ pcs$2.1880