microcontroller

HPM6880IBD1

Symbol
VSSA3PC03/GPIO_C_03(ALT0)/GPTMR1_CAPT_1(ALT1)/UART0_CTS(ALT3)/MCAN1_STBY(ALT7)/I2S2_RXD_0(ALT8)/SDC0_DATA_1(ALT17)/XPI_SLV_ADQ_1(ALT30)A5PC08/GPIO_C_08(ALT0)/GPTMR0_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/MCAN2_TXD(ALT7)/I2S2_TXD_2(ALT8)/DAO_LN(ALT10)/SDC0_DATA_4(ALT17)/XPI_SLV_ERR(ALT30)A7VSSA9PC20/GPIO_C_20(ALT0)/GPTMR3_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI0_CS_0(ALT5)/MCAN5_RXD(ALT7)/I2S1_RXD_0(ALT8)/SDC1_CLK(ALT17)/ETH0_TXCK(ALT18)A11PC24/GPIO_C_24(ALT0)/GPTMR2_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI1_CS_2(ALT5)/MCAN6_TXD(ALT7)/I2S1_TXD_0(ALT8)/SDC1_CDN(ALT17)/ETH0_RXD_2(ALT18)A13VSSA15PD04/GPIO_D_04(ALT0)/GPTMR5_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI3_CS_0(ALT5)/MCAN1_RXD(ALT7)/PDM0_D_0(ALT10)/XPI0_CA_CS0(ALT14)A17PD08/GPIO_D_08(ALT0)/GPTMR4_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/SPI2_CS_2(ALT5)/MCAN2_TXD(ALT7)/PDM0_CLK(ALT10)/XPI0_CA_D_0(ALT14)/ETH0_TXCK(ALT18)A19VSSA21PD22/GPIO_D_22(ALT0)/GPTMR6_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI0_MISO(ALT5)/I2S3_RXD_0(ALT8)/ETH0_EVTI_2(ALT19)A23PD30/GPIO_D_30(ALT0)/GPTMR6_CAPT_3(ALT1)/UART7_RXD(ALT2)/SPI1_DAT2(ALT5)/MCAN7_RXD(ALT7)/I2S3_MCLK(ALT8)/ETH0_EVTI_0(ALT19)/SOC_REF0(ALT24)A25VSSA27USB0_DPB2PC01/GPIO_C_01(ALT0)/GPTMR1_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/I2S2_RXD_2(ALT8)/SDC0_CMD(ALT17)/CPU0_NMI(ALT24)/XPI_SLV_CLK(ALT30)B4PC05/GPIO_C_05(ALT0)/GPTMR1_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI2_SCLK(ALT5)/MCAN1_TXD(ALT7)/I2S2_BCLK(ALT8)/SDC0_DATA_3(ALT17)/XPI_SLV_ADQ_2(ALT30)B6PC10/GPIO_C_10(ALT0)/GPTMR0_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/MCAN2_STBY(ALT7)/I2S2_TXD_0(ALT8)/DAO_RN(ALT10)/SDC0_DATA_6(ALT17)B8PC18/GPIO_C_18(ALT0)/GPTMR3_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S1_RXD_2(ALT8)/SDC1_DATA_3(ALT17)/ETH0_TXD_3(ALT18)B10PC22/GPIO_C_22(ALT0)/GPTMR2_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI0_MISO(ALT5)/I2S1_BCLK(ALT8)/SDC1_DATA_1(ALT17)/ETH0_TXD_0(ALT18)B12PC26/GPIO_C_26(ALT0)/GPTMR2_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI1_CS_0(ALT5)/MCAN6_STBY(ALT7)/I2S1_TXD_2(ALT8)/SDC1_WP(ALT17)/ETH0_RXCK(ALT18)B14PC28/GPIO_C_28(ALT0)/GPTMR3_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/SPI1_MISO(ALT5)/I2S1_MCLK(ALT8)/ETH0_RXD_1(ALT18)B16PD06/GPIO_D_06(ALT0)/GPTMR4_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI3_MISO(ALT5)/I2S2_RXD_3(ALT8)/PDM0_CLK(ALT10)/XPI0_CA_SCLK(ALT14)/ETH0_TXD_3(ALT18)B18PD10/GPIO_D_10(ALT0)/GPTMR4_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/SPI2_CS_0(ALT5)/MCAN2_STBY(ALT7)/I2S2_TXD_2(ALT8)/XPI0_CA_D_2(ALT14)/ETH0_TXD_0(ALT18)B20PD20/GPIO_D_20(ALT0)/GPTMR7_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI0_CS_0(ALT5)/MCAN5_RXD(ALT7)/I2S3_RXD_1(ALT8)/ETH0_EVTI_3(ALT19)B22PD24/GPIO_D_24(ALT0)/GPTMR6_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI1_CS_2(ALT5)/MCAN6_TXD(ALT7)/I2S3_BCLK(ALT8)/ETH0_EVTI_1(ALT19)B24PE01/GPIO_E_01(ALT0)/GPTMR1_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/I2S3_TXD_2(ALT8)/PDM0_D_1(ALT10)B26PE00/GPIO_E_00(ALT0)/GPTMR1_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/I2S3_TXD_3(ALT8)/PDM0_CLK(ALT10)/SYSCTL_CLK_OBS_0(ALT24)B28VSSC1USB0_DNC3PC04/GPIO_C_04(ALT0)/GPTMR1_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI2_CS_0(ALT5)/MCAN1_RXD(ALT7)/I2S2_RXD_1(ALT8)/SDC0_DATA_2(ALT17)/XPI_SLV_ADQ_3(ALT30)C5PC09/GPIO_C_09(ALT0)/GPTMR0_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/MCAN2_RXD(ALT7)/I2S2_TXD_3(ALT8)/DAO_LP(ALT10)/SDC0_DATA_5(ALT17)/XPI_SLV_RDY(ALT30)C7VSSC9PC21/GPIO_C_21(ALT0)/GPTMR3_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI0_SCLK(ALT5)/MCAN5_TXD(ALT7)/I2S1_RXD_1(ALT8)/SDC1_CMD(ALT17)/ETH0_TXEN(ALT18)C11PC25/GPIO_C_25(ALT0)/GPTMR2_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI1_CS_1(ALT5)/MCAN6_RXD(ALT7)/I2S1_TXD_1(ALT8)/SDC1_VSEL(ALT17)/ETH0_RXD_3(ALT18)C13VSSC15PD05/GPIO_D_05(ALT0)/GPTMR5_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI3_SCLK(ALT5)/MCAN1_TXD(ALT7)/PDM0_D_1(ALT10)/XPI0_CA_CS1(ALT14)C17PD09/GPIO_D_09(ALT0)/GPTMR4_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/SPI2_CS_1(ALT5)/MCAN2_RXD(ALT7)/PDM0_D_2(ALT10)/XPI0_CA_D_1(ALT14)/ETH0_TXEN(ALT18)C19VSSC21PD23/GPIO_D_23(ALT0)/GPTMR6_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI0_MOSI(ALT5)/I2S3_RXD_2(ALT8)/ETH0_EVTO_1(ALT19)C23PD31/GPIO_D_31(ALT0)/GPTMR6_COMP_3(ALT1)/UART7_TXD(ALT2)/SPI1_DAT3(ALT5)/MCAN7_TXD(ALT7)/I2S3_MCLK(ALT8)/ETH0_EVTO_0(ALT19)/SOC_REF1(ALT24)C25PE02/GPIO_E_02(ALT0)/GPTMR1_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/I2S3_TXD_1(ALT8)/PDM0_D_0(ALT10)/SYSCTL_CLK_OBS_2(ALT24)C27VSSC29XTAL_OUTD2PC02/GPIO_C_02(ALT0)/GPTMR1_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/I2S2_RXD_3(ALT8)/SDC0_CLK(ALT17)/XPI_SLV_CSN(ALT30)D4PC06/GPIO_C_06(ALT0)/GPTMR0_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI2_MISO(ALT5)/I2S2_FCLK(ALT8)/SDC0_DATA_0(ALT17)/XPI_SLV_ADQ_0(ALT30)D6PC11/GPIO_C_11(ALT0)/GPTMR0_CAPT_2(ALT1)/UART2_CTS(ALT3)/I2S2_TXD_1(ALT8)/DAO_RP(ALT10)/SDC0_DATA_7(ALT17)D8PC19/GPIO_C_19(ALT0)/GPTMR3_CAPT_1(ALT1)/UART4_CTS(ALT3)/SPI1_CS_3(ALT5)/MCAN5_STBY(ALT7)/I2S1_RXD_3(ALT8)/SDC1_DATA_2(ALT17)/ETH0_TXD_2(ALT18)/ADC0_DBG(ALT24)D10PC23/GPIO_C_23(ALT0)/GPTMR2_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI0_MOSI(ALT5)/I2S1_FCLK(ALT8)/SDC1_DATA_0(ALT17)/ETH0_TXD_1(ALT18)/SYSCTL_CLK_OBS_0(ALT24)D12PC27/GPIO_C_27(ALT0)/GPTMR2_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI1_SCLK(ALT5)/I2S1_TXD_3(ALT8)/SDC1_VON(ALT17)/ETH0_RXDV(ALT18)/SYSCTL_CLK_OBS_2(ALT24)D14PC29/GPIO_C_29(ALT0)/GPTMR3_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/SPI1_MOSI(ALT5)/MCAN7_STBY(ALT7)/I2S1_MCLK(ALT8)/ETH0_RXD_0(ALT18)D16PD07/GPIO_D_07(ALT0)/GPTMR4_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI3_MOSI(ALT5)/I2S2_RXD_2(ALT8)/PDM0_D_3(ALT10)/XPI0_CA_DQS(ALT14)/ETH0_TXD_2(ALT18)D18PD11/GPIO_D_11(ALT0)/GPTMR4_CAPT_2(ALT1)/UART2_CTS(ALT3)/SPI2_SCLK(ALT5)/I2S2_TXD_3(ALT8)/XPI0_CA_D_3(ALT14)/ETH0_TXD_1(ALT18)D20PD21/GPIO_D_21(ALT0)/GPTMR7_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI0_SCLK(ALT5)/MCAN5_TXD(ALT7)/I2S3_RXD_3(ALT8)/ETH0_EVTO_3(ALT19)D22PD25/GPIO_D_25(ALT0)/GPTMR6_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI1_CS_1(ALT5)/MCAN6_RXD(ALT7)/I2S3_FCLK(ALT8)/ETH0_EVTO_2(ALT19)D24PE04/GPIO_E_04(ALT0)/GPTMR1_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI3_CS_0(ALT5)/MCAN1_RXD(ALT7)/I2S3_MCLK(ALT8)/SYSCTL_CLK_OBS_3(ALT24)D26PE03/GPIO_E_03(ALT0)/GPTMR1_CAPT_1(ALT1)/UART0_CTS(ALT3)/SPI2_CS_3(ALT5)/MCAN1_STBY(ALT7)/I2S3_TXD_0(ALT8)/SYSCTL_CLK_OBS_1(ALT24)D28XTAL_INE1PC00/GPIO_C_00(ALT0)/GPTMR1_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/I2S2_MCLK(ALT8)/SDC0_DS(ALT17)/XPI_SLV_DQS(ALT30)E3VSSE5PC07/GPIO_C_07(ALT0)/GPTMR0_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI2_MOSI(ALT5)/I2S2_MCLK(ALT8)/SDC0_RSTN(ALT17)E7PC12/GPIO_C_12(ALT0)/GPTMR1_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI3_MISO(ALT5)/PDM0_D_0(ALT10)/SDC1_DATA_3(ALT17)E9PC15/GPIO_C_15(ALT0)/GPTMR0_COMP_3(ALT1)/UART3_TXD(ALT2)/SPI3_SCLK(ALT5)/MCAN3_TXD(ALT7)/PDM0_D_2(ALT10)/SDC1_DATA_1(ALT17)E11PC30/GPIO_C_30(ALT0)/GPTMR2_CAPT_3(ALT1)/UART7_RXD(ALT2)/MCAN7_RXD(ALT7)/DAO_LN(ALT10)/SDC1_CDN(ALT17)E13VIO_B04E15PD12/GPIO_D_12(ALT0)/GPTMR5_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI2_MISO(ALT5)/I2S2_RXD_1(ALT8)/XPI0_CB_CS0(ALT14)/ETH0_RXD_1(ALT18)E17PD15/GPIO_D_15(ALT0)/GPTMR4_COMP_3(ALT1)/UART3_TXD(ALT2)/SPI2_DAT3(ALT5)/MCAN3_TXD(ALT7)/I2S2_BCLK(ALT8)/XPI0_CB_D_0(ALT14)/ETH0_RXDV(ALT18)E19PD19/GPIO_D_19(ALT0)/GPTMR7_CAPT_1(ALT1)/UART4_CTS(ALT3)/SPI1_CS_3(ALT5)/MCAN5_STBY(ALT7)/I2S2_TXD_1(ALT8)/XPI0_CB_D_2(ALT14)E21PD28/GPIO_D_28(ALT0)/GPTMR7_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/SPI1_MISO(ALT5)/I2S3_TXD_0(ALT8)E23VSSE25PE09/GPIO_E_09(ALT0)/GPTMR0_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/SPI2_CS_1(ALT5)/MCAN2_RXD(ALT7)/I2S3_MCLK(ALT8)/ETH0_EVTI_3(ALT19)E27PE08/GPIO_E_08(ALT0)/GPTMR0_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/SPI2_CS_2(ALT5)/MCAN2_TXD(ALT7)/I2S3_FCLK(ALT8)/ETH0_EVTO_3(ALT19)E29PB04/GPIO_B_04(ALT0)/GPTMR5_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI2_CS_0(ALT5)/MCAN1_RXD(ALT7)/DIS0_B_2(ALT20)F2PB05/GPIO_B_05(ALT0)/GPTMR5_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI2_SCLK(ALT5)/MCAN1_TXD(ALT7)/DIS0_G_7(ALT20)F4PB22/GPIO_B_22(ALT0)/GPTMR6_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI1_MISO(ALT5)/I2S1_TXD_3(ALT8)/SDC0_DATA_6(ALT17)F6PB24/GPIO_B_24(ALT0)/GPTMR6_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI0_CS_2(ALT5)/MCAN6_TXD(ALT7)/I2S1_MCLK(ALT8)/SDC0_DATA_7(ALT17)F8PC13/GPIO_C_13(ALT0)/GPTMR1_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI3_MOSI(ALT5)/MCAN3_STBY(ALT7)/PDM0_CLK(ALT10)/SDC1_CMD(ALT17)F10PC17/GPIO_C_17(ALT0)/GPTMR3_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/PDM0_D_3(ALT10)/SDC1_DATA_0(ALT17)F12PD00/GPIO_D_00(ALT0)/GPTMR5_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/DAO_RN(ALT10)/SDC1_VON(ALT17)F14PD02/GPIO_D_02(ALT0)/GPTMR5_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/ETH0_MDC(ALT18)F16PD14/GPIO_D_14(ALT0)/GPTMR4_CAPT_3(ALT1)/UART3_RXD(ALT2)/SPI2_DAT2(ALT5)/MCAN3_RXD(ALT7)/I2S2_RXD_0(ALT8)/XPI0_CB_SCLK(ALT14)/ETH0_RXCK(ALT18)F18PD17/GPIO_D_17(ALT0)/GPTMR7_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/I2S2_TXD_0(ALT8)/XPI0_CB_DQS(ALT14)/ETH0_RXD_2(ALT18)F20PD26/GPIO_D_26(ALT0)/GPTMR6_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI1_CS_0(ALT5)/MCAN6_STBY(ALT7)/I2S3_TXD_1(ALT8)/ETH0_MDC(ALT18)F22PE06/GPIO_E_06(ALT0)/GPTMR0_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI3_MISO(ALT5)/DAO_LN(ALT10)F24PE11/GPIO_E_11(ALT0)/GPTMR0_CAPT_2(ALT1)/UART2_CTS(ALT3)/SPI2_SCLK(ALT5)/DAO_RN(ALT10)/ETH0_EVTI_2(ALT19)F26PE10/GPIO_E_10(ALT0)/GPTMR0_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/SPI2_CS_0(ALT5)/MCAN2_STBY(ALT7)/I2S3_BCLK(ALT8)/ETH0_EVTO_1(ALT19)F28PB06/GPIO_B_06(ALT0)/GPTMR4_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI2_MISO(ALT5)/DIS0_B_3(ALT20)G1PB07/GPIO_B_07(ALT0)/GPTMR4_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI2_MOSI(ALT5)/DIS0_B_4(ALT20)G3PB25/GPIO_B_25(ALT0)/GPTMR6_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI0_CS_1(ALT5)/MCAN6_RXD(ALT7)/I2S1_BCLK(ALT8)/SDC0_DATA_4(ALT17)G5PB23/GPIO_B_23(ALT0)/GPTMR6_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI1_MOSI(ALT5)/I2S1_FCLK(ALT8)/SDC0_DATA_5(ALT17)G7VIO_B02G9PC16/GPIO_C_16(ALT0)/GPTMR3_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/PDM0_CLK(ALT10)/SDC1_CLK(ALT17)G11PC31/GPIO_C_31(ALT0)/GPTMR2_COMP_3(ALT1)/UART7_TXD(ALT2)/MCAN7_TXD(ALT7)/DAO_LP(ALT10)/SDC1_VSEL(ALT17)G13VIO_B05G15PD13/GPIO_D_13(ALT0)/GPTMR5_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI2_MOSI(ALT5)/MCAN3_STBY(ALT7)/I2S2_MCLK(ALT8)/XPI0_CB_CS1(ALT14)/ETH0_RXD_0(ALT18)G17PD16/GPIO_D_16(ALT0)/GPTMR7_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/I2S2_FCLK(ALT8)/XPI0_CB_D_1(ALT14)/ETH0_RXD_3(ALT18)G19VIO_B06G21PD29/GPIO_D_29(ALT0)/GPTMR7_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/SPI1_MOSI(ALT5)/MCAN7_STBY(ALT7)/I2S3_TXD_3(ALT8)/CPU0_NMI(ALT24)G23PE05/GPIO_E_05(ALT0)/GPTMR1_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI3_SCLK(ALT5)/MCAN1_TXD(ALT7)/DAO_RP(ALT10)G25PE13/GPIO_E_13(ALT0)/GPTMR1_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI2_MOSI(ALT5)/MCAN3_STBY(ALT7)/I2S3_RXD_0(ALT8)/PDM0_D_3(ALT10)/ETH0_EVTI_1(ALT19)G27PE12/GPIO_E_12(ALT0)/GPTMR1_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI2_MISO(ALT5)/I2S3_RXD_1(ALT8)/PDM0_D_2(ALT10)/ETH0_EVTO_2(ALT19)G29PB08/GPIO_B_08(ALT0)/GPTMR4_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/SPI3_CS_2(ALT5)/MCAN2_TXD(ALT7)/DIS0_B_6(ALT20)H2PB09/GPIO_B_09(ALT0)/GPTMR4_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/SPI3_CS_1(ALT5)/MCAN2_RXD(ALT7)/DIS0_B_5(ALT20)H4PB26/GPIO_B_26(ALT0)/GPTMR6_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI0_CS_0(ALT5)/MCAN6_STBY(ALT7)/I2S1_RXD_1(ALT8)/SDC0_DATA_3(ALT17)H6PB27/GPIO_B_27(ALT0)/GPTMR6_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI0_SCLK(ALT5)/I2S1_RXD_3(ALT8)/SDC0_DATA_0(ALT17)H8PC14/GPIO_C_14(ALT0)/GPTMR0_CAPT_3(ALT1)/UART3_RXD(ALT2)/SPI3_CS_0(ALT5)/MCAN3_RXD(ALT7)/PDM0_D_1(ALT10)/SDC1_DATA_2(ALT17)H10VIO_B03H12PD01/GPIO_D_01(ALT0)/GPTMR5_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/DAO_RP(ALT10)/SDC1_WP(ALT17)H14PD03/GPIO_D_03(ALT0)/GPTMR5_CAPT_1(ALT1)/UART0_CTS(ALT3)/MCAN1_STBY(ALT7)/ETH0_MDIO(ALT18)H16VIO_B06H18PD18/GPIO_D_18(ALT0)/GPTMR7_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S2_MCLK(ALT8)/XPI0_CB_D_3(ALT14)H20PD27/GPIO_D_27(ALT0)/GPTMR6_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI1_SCLK(ALT5)/I2S3_TXD_2(ALT8)/ETH0_MDIO(ALT18)H22PE07/GPIO_E_07(ALT0)/GPTMR0_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI3_MOSI(ALT5)/DAO_LP(ALT10)H24PE15/GPIO_E_15(ALT0)/GPTMR0_COMP_3(ALT1)/UART3_TXD(ALT2)/SPI2_DAT3(ALT5)/MCAN3_TXD(ALT7)/I2S3_RXD_2(ALT8)/ETH0_MDC(ALT18)/ETH0_EVTI_0(ALT19)H26PE14/GPIO_E_14(ALT0)/GPTMR0_CAPT_3(ALT1)/UART3_RXD(ALT2)/SPI2_DAT2(ALT5)/MCAN3_RXD(ALT7)/I2S3_RXD_3(ALT8)/PDM0_CLK(ALT10)/ETH0_MDIO(ALT18)/ETH0_EVTO_0(ALT19)H28VSSJ1VSSJ3PB28/GPIO_B_28(ALT0)/GPTMR7_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/SPI0_MISO(ALT5)/I2S1_RXD_0(ALT8)/SDC0_DATA_1(ALT17)/CPU0_NMI(ALT24)J5VIO_B01J7USB0_VBUSJ9VSSJ11VSSJ13VIO_B11J15VSSJ17VSSJ19VIO_B07J21VDDRJ23VDDRJ25VSSJ27VSSJ29PB10/GPIO_B_10(ALT0)/GPTMR4_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/SPI3_CS_0(ALT5)/MCAN2_STBY(ALT7)/DIS0_EN(ALT20)K2PB11/GPIO_B_11(ALT0)/GPTMR4_CAPT_2(ALT1)/UART2_CTS(ALT3)/SPI3_SCLK(ALT5)/DIS0_B_7(ALT20)K4PB29/GPIO_B_29(ALT0)/GPTMR7_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/SPI0_MOSI(ALT5)/MCAN7_STBY(ALT7)/I2S1_RXD_2(ALT8)/SDC0_DATA_2(ALT17)K6PB31/GPIO_B_31(ALT0)/GPTMR6_COMP_3(ALT1)/UART7_TXD(ALT2)/SPI0_DAT3(ALT5)/MCAN7_TXD(ALT7)/SDC0_CMD(ALT17)K8VUSBK10VSSK12VSSK14VSSK16VSSK18VIO_B08K20DDR_DM1K22DDR_D9K24DDR_D6K26DDR_D4K28PB12/GPIO_B_12(ALT0)/GPTMR5_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI3_MISO(ALT5)/DIS0_HSYNC(ALT20)L1PB13/GPIO_B_13(ALT0)/GPTMR5_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI3_MOSI(ALT5)/MCAN3_STBY(ALT7)/DIS0_CLK(ALT20)L3PA29/GPIO_A_29(ALT0)/GPTMR3_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/MCAN7_STBY(ALT7)/CAM0_XCLK(ALT22)L5PB30/GPIO_B_30(ALT0)/GPTMR6_CAPT_3(ALT1)/UART7_RXD(ALT2)/SPI0_DAT2(ALT5)/MCAN7_RXD(ALT7)/SDC0_CLK(ALT17)L7VSSL9VUSBL11VPLLL13VSSL15VDD_2V5CAPL17VIO_B08L19VSSL21DDR_D11L23DDR_D13L25DDR_DQS0NL27DDR_DQS0PL29PB14/GPIO_B_14(ALT0)/GPTMR4_CAPT_3(ALT1)/UART3_RXD(ALT2)/SPI3_DAT2(ALT5)/MCAN3_RXD(ALT7)/DIS0_VSYNC(ALT20)/SYSCTL_CLK_OBS_1(ALT24)M2PB15/GPIO_B_15(ALT0)/GPTMR4_COMP_3(ALT1)/UART3_TXD(ALT2)/SPI3_DAT3(ALT5)/MCAN3_TXD(ALT7)/SDC0_DS(ALT17)/SYSCTL_CLK_OBS_3(ALT24)M4PA28/GPIO_A_28(ALT0)/GPTMR3_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/DIS0_R_0(ALT20)M6VIO_B01M8VSSM10VPLLM12VDD_SOCM14VDD_SOCM16VDD_2V5CAPM18VSSM20VDDRM22DDR_D15M24DDR_D2M26VSSM28PA30/GPIO_A_30(ALT0)/GPTMR2_CAPT_3(ALT1)/UART7_RXD(ALT2)/MCAN7_RXD(ALT7)/DIS0_R_2(ALT20)N1PA31/GPIO_A_31(ALT0)/GPTMR2_COMP_3(ALT1)/UART7_TXD(ALT2)/MCAN7_TXD(ALT7)/DIS0_R_1(ALT20)N3PB16/GPIO_B_16(ALT0)/GPTMR7_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/CAM0_D_6(ALT22)N5PB17/GPIO_B_17(ALT0)/GPTMR7_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/CAM0_D_7(ALT22)N7VSSN9VPLLN11VDD_SOCN13VSSN15VDD_SOCN17VDD_2V5CAPN19VSSN21DDR_D14N23DDR_D12N25DDR_D0N27DDR_DM0N29PB00/GPIO_B_00(ALT0)/GPTMR5_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/DIS0_G_1(ALT20)P2PB01/GPIO_B_01(ALT0)/GPTMR5_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/DIS0_G_0(ALT20)P4PB18/GPIO_B_18(ALT0)/GPTMR7_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S1_TXD_1(ALT8)/CAM0_D_9(ALT22)P6PB19/GPIO_B_19(ALT0)/GPTMR7_CAPT_1(ALT1)/UART4_CTS(ALT3)/SPI0_CS_3(ALT5)/MCAN5_STBY(ALT7)/I2S1_MCLK(ALT8)/CAM0_D_8(ALT22)P8VSSP10VDD_SOCP12VDD_SOCP14VDD_SOCP16VDD_SOCP18VSSP20DDR_DQS1NP22DDR_DQS1PP24DDR_D1P26DDR_D3P28VSSR1VSSR3VIO_B01R5VIO_B01R7VDDA_MIPIR9VSSR11VSSR13VSSR15VSSAJ27DDR_CKE1AJ25PE16/GPIO_E_16(ALT0)/GPTMR3_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/I2S0_TXD_2(ALT8)/ETH0_EVTO_0(ALT19)AJ23VSSAJ21PE22/GPIO_E_22(ALT0)/GPTMR2_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI0_MISO(ALT5)/I2S0_RXD_2(ALT8)/ETH0_EVTO_3(ALT19)AJ19PF02/GPIO_F_02(ALT0)/GPTMR5_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/PDM0_D_3(ALT10)/ETH0_EVTO_0(ALT19)AJ17VSSAJ15PY00/GPIO_Y_00(ALT0)/GPTMR1_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)AJ13PY04/GPIO_Y_04(ALT0)/GPTMR1_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI2_CS_0(ALT5)/MCAN1_RXD(ALT7)/PDM0_D_3(ALT10)AJ11VSSAJ9DCDCM_LPAJ7DCDC_INAJ5VSSAJ3DDR_A14AH28DDR_A8AH26VSSAH24PE18/GPIO_E_18(ALT0)/GPTMR3_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S0_TXD_0(ALT8)/ETH0_EVTO_1(ALT19)/USB0_PWR(ALT24)AH22PE20/GPIO_E_20(ALT0)/GPTMR3_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI0_CS_0(ALT5)/MCAN5_RXD(ALT7)/I2S0_RXD_0(ALT8)/ETH0_EVTO_2(ALT19)/USB0_ID(ALT24)AH20PF00/GPIO_F_00(ALT0)/GPTMR5_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/PDM0_CLK(ALT10)/USB0_PWR(ALT24)AH18PF04/GPIO_F_04(ALT0)/GPTMR5_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI2_CS_0(ALT5)/MCAN1_RXD(ALT7)/PDM0_CLK(ALT10)/ETH0_EVTO_2(ALT19)/USB0_ID(ALT24)AH16RTC_XTAL_INAH14PY02/GPIO_Y_02(ALT0)/GPTMR1_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/PDM0_CLK(ALT10)AH12PY06/GPIO_Y_06(ALT0)/GPTMR0_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI2_MISO(ALT5)/PDM0_CLK(ALT10)AH10DCDC_GNDAH8DCDCM_LPAH6DCDC_INAH4DCDC_INAH2VSSAG29DDR_A6AG27DDR_CKE0AG25PE17/GPIO_E_17(ALT0)/GPTMR3_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/I2S0_TXD_3(ALT8)/ETH0_EVTI_0(ALT19)AG23VSSAG21PE23/GPIO_E_23(ALT0)/GPTMR2_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI0_MOSI(ALT5)/I2S0_RXD_3(ALT8)/ETH0_EVTI_3(ALT19)/USB0_OC(ALT24)AG19PF03/GPIO_F_03(ALT0)/GPTMR5_CAPT_1(ALT1)/UART0_CTS(ALT3)/SPI3_CS_3(ALT5)/MCAN1_STBY(ALT7)/PDM0_D_1(ALT10)/ETH0_EVTO_1(ALT19)/USB0_OC(ALT24)AG17VSSAG15PY01/GPIO_Y_01(ALT0)/GPTMR1_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)AG13PY05/GPIO_Y_05(ALT0)/GPTMR1_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI2_SCLK(ALT5)/MCAN1_TXD(ALT7)/PDM0_D_1(ALT10)AG11VSSAG9DCDCM_SNSAG7DCDC_INAG5DCDC_INAG3VSSAG1DDR_A4AF28DDR_A11AF26DDR_ZQAF24PE19/GPIO_E_19(ALT0)/GPTMR3_CAPT_1(ALT1)/UART4_CTS(ALT3)/SPI1_CS_3(ALT5)/MCAN5_STBY(ALT7)/I2S0_TXD_1(ALT8)/ETH0_EVTI_1(ALT19)AF22PE21/GPIO_E_21(ALT0)/GPTMR3_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI0_SCLK(ALT5)/MCAN5_TXD(ALT7)/I2S0_RXD_1(ALT8)/ETH0_EVTI_2(ALT19)AF20PF01/GPIO_F_01(ALT0)/GPTMR5_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/PDM0_D_2(ALT10)/CPU0_NMI(ALT24)AF18PF05/GPIO_F_05(ALT0)/GPTMR5_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI2_SCLK(ALT5)/MCAN1_TXD(ALT7)/PDM0_D_0(ALT10)/ETH0_EVTO_3(ALT19)AF16RTC_XTAL_OUTAF14PY03/GPIO_Y_03(ALT0)/GPTMR1_CAPT_1(ALT1)/UART0_CTS(ALT3)/MCAN1_STBY(ALT7)/PDM0_D_2(ALT10)AF12PY07/GPIO_Y_07(ALT0)/GPTMR0_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI2_MOSI(ALT5)/PDM0_D_0(ALT10)AF10DCDC_GNDAF8DCDC_LPAF6DCDC_LPAF4DCDC_LPAF2DDR_BA1AE29DDR_A1AE27VSSAE25PE24/GPIO_E_24(ALT0)/GPTMR2_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI1_CS_2(ALT5)/MCAN6_TXD(ALT7)/I2S0_FCLK(ALT8)/ETH0_MDIO(ALT18)AE23PE26/GPIO_E_26(ALT0)/GPTMR2_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI1_CS_0(ALT5)/MCAN6_STBY(ALT7)/I2S0_BCLK(ALT8)AE21PE29/GPIO_E_29(ALT0)/GPTMR3_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/SPI1_MOSI(ALT5)/MCAN7_STBY(ALT7)/DAO_LN(ALT10)AE19PF06/GPIO_F_06(ALT0)/GPTMR4_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI2_MISO(ALT5)/ETH0_EVTI_0(ALT19)AE17VBATAE15PZ02/GPIO_Z_02(ALT0)/GPTMR3_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/DAO_RP(ALT10)AE13PZ04/GPIO_Z_04(ALT0)/GPTMR3_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI0_CS_0(ALT5)/MCAN5_RXD(ALT7)/DAO_LP(ALT10)AE11RESETNAE9DCDC_SNSAE7DCDC_GNDAE5DCDC_GNDAE3DCDC_GNDAE1VSSAD28DDR_A12AD26DDR_A15AD24PE25/GPIO_E_25(ALT0)/GPTMR2_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI1_CS_1(ALT5)/MCAN6_RXD(ALT7)/I2S0_MCLK(ALT8)/ETH0_MDC(ALT18)AD22PE27/GPIO_E_27(ALT0)/GPTMR2_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI1_SCLK(ALT5)/I2S0_MCLK(ALT8)/USB0_PWR(ALT24)AD20PE31/GPIO_E_31(ALT0)/GPTMR2_COMP_3(ALT1)/UART7_TXD(ALT2)/SPI1_DAT3(ALT5)/MCAN7_TXD(ALT7)/DAO_LP(ALT10)AD18PF08/GPIO_F_08(ALT0)/GPTMR4_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/SPI3_CS_2(ALT5)/MCAN2_TXD(ALT7)/ETH0_MDIO(ALT18)/ETH0_EVTI_2(ALT19)AD16PZ00/GPIO_Z_00(ALT0)/GPTMR3_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)AD14VPMCAD12PZ06/GPIO_Z_06(ALT0)/GPTMR2_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI0_MISO(ALT5)AD10PA15/GPIO_A_15(ALT0)/GPTMR0_COMP_3(ALT1)/UART3_TXD(ALT2)/MCAN3_TXD(ALT7)/I2S0_RXD_3(ALT8)/DIS0_R_3(ALT20)/CAM0_HSYNC(ALT22)AD8PA14/GPIO_A_14(ALT0)/GPTMR0_CAPT_3(ALT1)/UART3_RXD(ALT2)/MCAN3_RXD(ALT7)/I2S0_RXD_1(ALT8)/DIS0_CLK(ALT20)/CAM0_VSYNC(ALT22)AD6PA01/GPIO_A_01(ALT0)/GPTMR1_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/DAO_RP(ALT10)AD4PA00/GPIO_A_00(ALT0)/GPTMR1_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/DAO_RN(ALT10)AD2DDR_A3AC29DDR_A0AC27DDR_CKNAC25DDR_A10AC23VIO_B09AC21PE30/GPIO_E_30(ALT0)/GPTMR2_CAPT_3(ALT1)/UART7_RXD(ALT2)/SPI1_DAT2(ALT5)/MCAN7_RXD(ALT7)/DAO_RN(ALT10)/USB0_OC(ALT24)AC19PF07/GPIO_F_07(ALT0)/GPTMR4_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI2_MOSI(ALT5)/ETH0_EVTI_1(ALT19)AC17VBATAC15PZ03/GPIO_Z_03(ALT0)/GPTMR3_CAPT_1(ALT1)/UART4_CTS(ALT3)/MCAN5_STBY(ALT7)/DAO_RN(ALT10)AC13PZ05/GPIO_Z_05(ALT0)/GPTMR3_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI0_SCLK(ALT5)/MCAN5_TXD(ALT7)/DAO_LN(ALT10)AC11VDD_PMCCAPAC9PA17/GPIO_A_17(ALT0)/GPTMR3_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/I2S0_RXD_2(ALT8)/DIS0_R_4(ALT20)/CAM0_D_8(ALT22)AC7PA16/GPIO_A_16(ALT0)/GPTMR3_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/I2S0_RXD_0(ALT8)/DIS0_R_5(ALT20)/CAM0_D_9(ALT22)AC5PA03/GPIO_A_03(ALT0)/GPTMR1_CAPT_1(ALT1)/UART0_CTS(ALT3)/MCAN1_STBY(ALT7)/DAO_LP(ALT10)AC3PA02/GPIO_A_02(ALT0)/GPTMR1_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/DAO_LN(ALT10)AC1DDR_A5AB28DDR_A2AB26DDR_CKPAB24VDDRAB22PE28/GPIO_E_28(ALT0)/GPTMR3_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/SPI1_MISO(ALT5)/DAO_RP(ALT10)/USB0_ID(ALT24)AB20VIO_B09AB18PF09/GPIO_F_09(ALT0)/GPTMR4_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/SPI3_CS_1(ALT5)/MCAN2_RXD(ALT7)/ETH0_MDC(ALT18)/ETH0_EVTI_3(ALT19)AB16PZ01/GPIO_Z_01(ALT0)/GPTMR3_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)AB14VPMCAB12PZ07/GPIO_Z_07(ALT0)/GPTMR2_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI0_MOSI(ALT5)AB10PA19/GPIO_A_19(ALT0)/GPTMR3_CAPT_1(ALT1)/UART4_CTS(ALT3)/MCAN5_STBY(ALT7)/I2S0_MCLK(ALT8)/DIS0_R_6(ALT20)/CAM0_D_6(ALT22)AB8PA18/GPIO_A_18(ALT0)/GPTMR3_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S0_FCLK(ALT8)/DIS0_R_7(ALT20)/CAM0_D_7(ALT22)/CPU0_NMI(ALT24)AB6PA05/GPIO_A_05(ALT0)/GPTMR1_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/MCAN1_TXD(ALT7)/JTAG_TDI(ALT24)AB4PA04/GPIO_A_04(ALT0)/GPTMR1_CAPT_2(ALT1)/UART1_CTS(ALT3)/MCAN1_RXD(ALT7)/JTAG_TDO(ALT24)AB2VSSAA29VSSAA27VDDRAA25VDDRAA23VDDRAA21VREFLAA19VSSAA17VIO_B10AA15VSSAA13VSSAA11VDD_SOCAA9VIO_B00AA7PA20/GPIO_A_20(ALT0)/GPTMR3_CAPT_2(ALT1)/UART5_CTS(ALT3)/MCAN5_RXD(ALT7)/I2S0_BCLK(ALT8)/DIS0_G_2(ALT20)/CAM0_PIXCLK(ALT22)AA5VSSAA3VSSAA1DDR_A13Y28DDR_A9Y26DDR_RASY24DDR_VREFY22VREFHY20VREFLY18VSSY16VSSY14VSSY12VDD_SOCY10PA22/GPIO_A_22(ALT0)/GPTMR2_CAPT_0(ALT1)/UART5_RXD(ALT2)/I2S0_TXD_3(ALT8)Y8PA21/GPIO_A_21(ALT0)/GPTMR3_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/MCAN5_TXD(ALT7)/I2S0_TXD_1(ALT8)/CAM0_XCLK(ALT22)Y6PA07/GPIO_A_07(ALT0)/GPTMR0_COMP_0(ALT1)/UART1_TXD(ALT2)/JTAG_TMS(ALT24)Y4PA06/GPIO_A_06(ALT0)/GPTMR0_CAPT_0(ALT1)/UART1_RXD(ALT2)/JTAG_TCK(ALT24)Y2DDR_RSTW29DDR_A7W27DDR_CASW25DDR_WEW23VSSW21VREFHW19VANAW17VSSW15VDD_SOCW13VDD_SOCW11VSSW9PA24/GPIO_A_24(ALT0)/GPTMR2_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI1_MISO(ALT5)/MCAN6_TXD(ALT7)/I2S0_TXD_2(ALT8)/SDC1_VON(ALT17)/CAM0_D_5(ALT22)W7PA23/GPIO_A_23(ALT0)/GPTMR2_COMP_0(ALT1)/UART5_TXD(ALT2)/I2S0_TXD_0(ALT8)/SDC0_RSTN(ALT17)/CAM0_D_4(ALT22)W5PA09/GPIO_A_09(ALT0)/GPTMR0_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/MCAN2_RXD(ALT7)/PDM0_D_3(ALT10)W3PA08/GPIO_A_08(ALT0)/GPTMR0_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/MCAN2_TXD(ALT7)/PDM0_D_1(ALT10)/JTAG_TRST(ALT24)W1VSSV28DDR_CS1V26DDR_CS0V24VDDRV22VSSAV20VANAV18VDD_SOCV16VDD_SOCV14VDD_SOCV12VSSV10VIO_B00V8PA25/GPIO_A_25(ALT0)/GPTMR2_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI1_MOSI(ALT5)/MCAN6_RXD(ALT7)/I2S0_MCLK(ALT8)/SDC1_VSEL(ALT17)/CAM0_D_3(ALT22)V6PA11/GPIO_A_11(ALT0)/GPTMR0_CAPT_2(ALT1)/UART2_CTS(ALT3)/SPI0_SCLK(ALT5)/PDM0_CLK(ALT10)/DIS0_G_3(ALT20)/CAM0_D_2(ALT22)V4PA10/GPIO_A_10(ALT0)/GPTMR0_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/SPI0_CS_0(ALT5)/MCAN2_STBY(ALT7)/PDM0_CLK(ALT10)/DIS0_G_4(ALT20)/CAM0_D_3(ALT22)V2DDR_ODT1U29DDR_ODT0U27DDR_BA0U25DDR_BA2U23VSSU21VANAU19VDD_SOCU17VSSU15VDD_SOCU13VDD_SOCU11VSSU9PA27/GPIO_A_27(ALT0)/GPTMR2_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI1_SCLK(ALT5)/SDC1_WP(ALT17)/CAM0_D_2(ALT22)U7PA26/GPIO_A_26(ALT0)/GPTMR2_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI1_CS_0(ALT5)/MCAN6_STBY(ALT7)/SDC1_CDN(ALT17)/CAM0_PIXCLK(ALT22)U5PA13/GPIO_A_13(ALT0)/GPTMR1_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI0_MOSI(ALT5)/MCAN3_STBY(ALT7)/PDM0_D_2(ALT10)/DIS0_G_5(ALT20)/CAM0_D_5(ALT22)U3PA12/GPIO_A_12(ALT0)/GPTMR1_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI0_MISO(ALT5)/PDM0_D_0(ALT10)/DIS0_G_6(ALT20)/CAM0_D_4(ALT22)/@U1DDR_D5T28DDR_D7T26DDR_D8T24DDR_D10T22VSSAT20VDD_SOCT18VDD_SOCT16VDD_SOCT14VDD_SOCT12VSST10PB20/GPIO_B_20(ALT0)/GPTMR7_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI1_CS_0(ALT5)/MCAN5_RXD(ALT7)/I2S1_TXD_2(ALT8)/CAM0_HSYNC(ALT22)T8PB21/GPIO_B_21(ALT0)/GPTMR7_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI1_SCLK(ALT5)/MCAN5_TXD(ALT7)/I2S1_TXD_0(ALT8)/CAM0_VSYNC(ALT22)T6PB03/GPIO_B_03(ALT0)/GPTMR5_CAPT_1(ALT1)/UART0_CTS(ALT3)/SPI3_CS_3(ALT5)/MCAN1_STBY(ALT7)/DIS0_B_0(ALT20)T4PB02/GPIO_B_02(ALT0)/GPTMR5_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/DIS0_B_1(ALT20)T2VSSR29VSSR27VDDRR25VDDRR23DDR_VREFR21VSSR19VSSR17
Footprint
C1E1G1J1L1N1R1U1W1AA1AC1AE1AG1B2D2F2H2K2M2P2T2V2Y2AB2AD2AF2AH2A3C3E3G3J3L3N3R3U3W3AA3AC3AE3AG3AJ3B4D4F4H4K4M4P4T4V4Y4AB4AD4AF4AH4A5C5E5G5J5L5N5R5U5W5AA5AC5AE5AG5AJ5B6D6F6H6K6M6P6T6V6Y6AB6AD6AF6AH6A7C7E7G7J7L7N7R7U7W7AA7AC7AE7AG7AJ7B8D8F8H8K8M8P8T8V8Y8AB8AD8AF8AH8A9C9E9G9J9L9N9R9U9W9AA9AC9AE9AG9AJ9B10D10F10H10K10M10P10T10V10Y10AB10AD10AF10AH10A11C11E11G11J11L11N11R11U11W11AA11AC11AE11AG11AJ11B12D12F12H12K12M12P12T12V12Y12AB12AD12AF12AH12A13C13E13G13J13L13N13R13U13W13AA13AC13AE13AG13AJ13B14D14F14H14K14M14P14T14V14Y14AB14AD14AF14AH14A15C15E15G15J15L15N15R15U15W15AA15AC15AE15AG15AJ15B16D16F16H16K16M16P16T16V16Y16AB16AD16AF16AH16A17C17E17G17J17L17N17R17U17W17AA17AC17AE17AG17AJ17B18D18F18H18K18M18P18T18V18Y18AB18AD18AF18AH18A19C19E19G19J19L19N19R19U19W19AA19AC19AE19AG19AJ19B20D20F20H20K20M20P20T20V20Y20AB20AD20AF20AH20A21C21E21G21J21L21N21R21U21W21AA21AC21AE21AG21AJ21B22D22F22H22K22M22P22T22V22Y22AB22AD22AF22AH22A23C23E23G23J23L23N23R23U23W23AA23AC23AE23AG23AJ23B24D24F24H24K24M24P24T24V24Y24AB24AD24AF24AH24A25C25E25G25J25L25N25R25U25W25AA25AC25AE25AG25AJ25B26D26F26H26K26M26P26T26V26Y26AB26AD26AF26AH26A27C27E27G27J27L27N27R27U27W27AA27AC27AE27AG27AJ27B28D28F28H28K28M28P28T28V28Y28AB28AD28AF28AH28C29E29G29J29L29N29R29U29W29AA29AC29AE29AG29
3D Model

Pin Map

PinNameTypeMountShapeWidth × Height (mm)
VSSgroundSMDcircle0.28×0.28
PC03/GPIO_C_03(ALT0)/GPTMR1_CAPT_1(ALT1)/UART0_CTS(ALT3)/MCAN1_STBY(ALT7)/I2S2_RXD_0(ALT8)/SDC0_DATA_1(ALT17)/XPI_SLV_ADQ_1(ALT30)passiveSMDcircle0.28×0.28
PC08/GPIO_C_08(ALT0)/GPTMR0_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/MCAN2_TXD(ALT7)/I2S2_TXD_2(ALT8)/DAO_LN(ALT10)/SDC0_DATA_4(ALT17)/XPI_SLV_ERR(ALT30)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PC20/GPIO_C_20(ALT0)/GPTMR3_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI0_CS_0(ALT5)/MCAN5_RXD(ALT7)/I2S1_RXD_0(ALT8)/SDC1_CLK(ALT17)/ETH0_TXCK(ALT18)passiveSMDcircle0.28×0.28
PC24/GPIO_C_24(ALT0)/GPTMR2_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI1_CS_2(ALT5)/MCAN6_TXD(ALT7)/I2S1_TXD_0(ALT8)/SDC1_CDN(ALT17)/ETH0_RXD_2(ALT18)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PD04/GPIO_D_04(ALT0)/GPTMR5_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI3_CS_0(ALT5)/MCAN1_RXD(ALT7)/PDM0_D_0(ALT10)/XPI0_CA_CS0(ALT14)passiveSMDcircle0.28×0.28
PD08/GPIO_D_08(ALT0)/GPTMR4_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/SPI2_CS_2(ALT5)/MCAN2_TXD(ALT7)/PDM0_CLK(ALT10)/XPI0_CA_D_0(ALT14)/ETH0_TXCK(ALT18)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PD22/GPIO_D_22(ALT0)/GPTMR6_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI0_MISO(ALT5)/I2S3_RXD_0(ALT8)/ETH0_EVTI_2(ALT19)passiveSMDcircle0.28×0.28
PD30/GPIO_D_30(ALT0)/GPTMR6_CAPT_3(ALT1)/UART7_RXD(ALT2)/SPI1_DAT2(ALT5)/MCAN7_RXD(ALT7)/I2S3_MCLK(ALT8)/ETH0_EVTI_0(ALT19)/SOC_REF0(ALT24)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
USB0_DPpassiveSMDcircle0.28×0.28
PC01/GPIO_C_01(ALT0)/GPTMR1_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/I2S2_RXD_2(ALT8)/SDC0_CMD(ALT17)/CPU0_NMI(ALT24)/XPI_SLV_CLK(ALT30)passiveSMDcircle0.28×0.28
PC05/GPIO_C_05(ALT0)/GPTMR1_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI2_SCLK(ALT5)/MCAN1_TXD(ALT7)/I2S2_BCLK(ALT8)/SDC0_DATA_3(ALT17)/XPI_SLV_ADQ_2(ALT30)passiveSMDcircle0.28×0.28
PC10/GPIO_C_10(ALT0)/GPTMR0_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/MCAN2_STBY(ALT7)/I2S2_TXD_0(ALT8)/DAO_RN(ALT10)/SDC0_DATA_6(ALT17)passiveSMDcircle0.28×0.28
PC18/GPIO_C_18(ALT0)/GPTMR3_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S1_RXD_2(ALT8)/SDC1_DATA_3(ALT17)/ETH0_TXD_3(ALT18)passiveSMDcircle0.28×0.28
PC22/GPIO_C_22(ALT0)/GPTMR2_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI0_MISO(ALT5)/I2S1_BCLK(ALT8)/SDC1_DATA_1(ALT17)/ETH0_TXD_0(ALT18)passiveSMDcircle0.28×0.28
PC26/GPIO_C_26(ALT0)/GPTMR2_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI1_CS_0(ALT5)/MCAN6_STBY(ALT7)/I2S1_TXD_2(ALT8)/SDC1_WP(ALT17)/ETH0_RXCK(ALT18)passiveSMDcircle0.28×0.28
PC28/GPIO_C_28(ALT0)/GPTMR3_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/SPI1_MISO(ALT5)/I2S1_MCLK(ALT8)/ETH0_RXD_1(ALT18)passiveSMDcircle0.28×0.28
PD06/GPIO_D_06(ALT0)/GPTMR4_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI3_MISO(ALT5)/I2S2_RXD_3(ALT8)/PDM0_CLK(ALT10)/XPI0_CA_SCLK(ALT14)/ETH0_TXD_3(ALT18)passiveSMDcircle0.28×0.28
PD10/GPIO_D_10(ALT0)/GPTMR4_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/SPI2_CS_0(ALT5)/MCAN2_STBY(ALT7)/I2S2_TXD_2(ALT8)/XPI0_CA_D_2(ALT14)/ETH0_TXD_0(ALT18)passiveSMDcircle0.28×0.28
PD20/GPIO_D_20(ALT0)/GPTMR7_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI0_CS_0(ALT5)/MCAN5_RXD(ALT7)/I2S3_RXD_1(ALT8)/ETH0_EVTI_3(ALT19)passiveSMDcircle0.28×0.28
PD24/GPIO_D_24(ALT0)/GPTMR6_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI1_CS_2(ALT5)/MCAN6_TXD(ALT7)/I2S3_BCLK(ALT8)/ETH0_EVTI_1(ALT19)passiveSMDcircle0.28×0.28
PE01/GPIO_E_01(ALT0)/GPTMR1_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/I2S3_TXD_2(ALT8)/PDM0_D_1(ALT10)passiveSMDcircle0.28×0.28
PE00/GPIO_E_00(ALT0)/GPTMR1_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/I2S3_TXD_3(ALT8)/PDM0_CLK(ALT10)/SYSCTL_CLK_OBS_0(ALT24)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
USB0_DNpassiveSMDcircle0.28×0.28
PC04/GPIO_C_04(ALT0)/GPTMR1_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI2_CS_0(ALT5)/MCAN1_RXD(ALT7)/I2S2_RXD_1(ALT8)/SDC0_DATA_2(ALT17)/XPI_SLV_ADQ_3(ALT30)passiveSMDcircle0.28×0.28
PC09/GPIO_C_09(ALT0)/GPTMR0_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/MCAN2_RXD(ALT7)/I2S2_TXD_3(ALT8)/DAO_LP(ALT10)/SDC0_DATA_5(ALT17)/XPI_SLV_RDY(ALT30)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PC21/GPIO_C_21(ALT0)/GPTMR3_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI0_SCLK(ALT5)/MCAN5_TXD(ALT7)/I2S1_RXD_1(ALT8)/SDC1_CMD(ALT17)/ETH0_TXEN(ALT18)passiveSMDcircle0.28×0.28
PC25/GPIO_C_25(ALT0)/GPTMR2_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI1_CS_1(ALT5)/MCAN6_RXD(ALT7)/I2S1_TXD_1(ALT8)/SDC1_VSEL(ALT17)/ETH0_RXD_3(ALT18)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PD05/GPIO_D_05(ALT0)/GPTMR5_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI3_SCLK(ALT5)/MCAN1_TXD(ALT7)/PDM0_D_1(ALT10)/XPI0_CA_CS1(ALT14)passiveSMDcircle0.28×0.28
PD09/GPIO_D_09(ALT0)/GPTMR4_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/SPI2_CS_1(ALT5)/MCAN2_RXD(ALT7)/PDM0_D_2(ALT10)/XPI0_CA_D_1(ALT14)/ETH0_TXEN(ALT18)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PD23/GPIO_D_23(ALT0)/GPTMR6_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI0_MOSI(ALT5)/I2S3_RXD_2(ALT8)/ETH0_EVTO_1(ALT19)passiveSMDcircle0.28×0.28
PD31/GPIO_D_31(ALT0)/GPTMR6_COMP_3(ALT1)/UART7_TXD(ALT2)/SPI1_DAT3(ALT5)/MCAN7_TXD(ALT7)/I2S3_MCLK(ALT8)/ETH0_EVTO_0(ALT19)/SOC_REF1(ALT24)passiveSMDcircle0.28×0.28
PE02/GPIO_E_02(ALT0)/GPTMR1_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/I2S3_TXD_1(ALT8)/PDM0_D_0(ALT10)/SYSCTL_CLK_OBS_2(ALT24)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
XTAL_OUTpassiveSMDcircle0.28×0.28
PC02/GPIO_C_02(ALT0)/GPTMR1_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/I2S2_RXD_3(ALT8)/SDC0_CLK(ALT17)/XPI_SLV_CSN(ALT30)passiveSMDcircle0.28×0.28
PC06/GPIO_C_06(ALT0)/GPTMR0_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI2_MISO(ALT5)/I2S2_FCLK(ALT8)/SDC0_DATA_0(ALT17)/XPI_SLV_ADQ_0(ALT30)passiveSMDcircle0.28×0.28
PC11/GPIO_C_11(ALT0)/GPTMR0_CAPT_2(ALT1)/UART2_CTS(ALT3)/I2S2_TXD_1(ALT8)/DAO_RP(ALT10)/SDC0_DATA_7(ALT17)passiveSMDcircle0.28×0.28
PC19/GPIO_C_19(ALT0)/GPTMR3_CAPT_1(ALT1)/UART4_CTS(ALT3)/SPI1_CS_3(ALT5)/MCAN5_STBY(ALT7)/I2S1_RXD_3(ALT8)/SDC1_DATA_2(ALT17)/ETH0_TXD_2(ALT18)/ADC0_DBG(ALT24)passiveSMDcircle0.28×0.28
PC23/GPIO_C_23(ALT0)/GPTMR2_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI0_MOSI(ALT5)/I2S1_FCLK(ALT8)/SDC1_DATA_0(ALT17)/ETH0_TXD_1(ALT18)/SYSCTL_CLK_OBS_0(ALT24)passiveSMDcircle0.28×0.28
PC27/GPIO_C_27(ALT0)/GPTMR2_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI1_SCLK(ALT5)/I2S1_TXD_3(ALT8)/SDC1_VON(ALT17)/ETH0_RXDV(ALT18)/SYSCTL_CLK_OBS_2(ALT24)passiveSMDcircle0.28×0.28
PC29/GPIO_C_29(ALT0)/GPTMR3_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/SPI1_MOSI(ALT5)/MCAN7_STBY(ALT7)/I2S1_MCLK(ALT8)/ETH0_RXD_0(ALT18)passiveSMDcircle0.28×0.28
PD07/GPIO_D_07(ALT0)/GPTMR4_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI3_MOSI(ALT5)/I2S2_RXD_2(ALT8)/PDM0_D_3(ALT10)/XPI0_CA_DQS(ALT14)/ETH0_TXD_2(ALT18)passiveSMDcircle0.28×0.28
PD11/GPIO_D_11(ALT0)/GPTMR4_CAPT_2(ALT1)/UART2_CTS(ALT3)/SPI2_SCLK(ALT5)/I2S2_TXD_3(ALT8)/XPI0_CA_D_3(ALT14)/ETH0_TXD_1(ALT18)passiveSMDcircle0.28×0.28
PD21/GPIO_D_21(ALT0)/GPTMR7_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI0_SCLK(ALT5)/MCAN5_TXD(ALT7)/I2S3_RXD_3(ALT8)/ETH0_EVTO_3(ALT19)passiveSMDcircle0.28×0.28
PD25/GPIO_D_25(ALT0)/GPTMR6_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI1_CS_1(ALT5)/MCAN6_RXD(ALT7)/I2S3_FCLK(ALT8)/ETH0_EVTO_2(ALT19)passiveSMDcircle0.28×0.28
PE04/GPIO_E_04(ALT0)/GPTMR1_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI3_CS_0(ALT5)/MCAN1_RXD(ALT7)/I2S3_MCLK(ALT8)/SYSCTL_CLK_OBS_3(ALT24)passiveSMDcircle0.28×0.28
PE03/GPIO_E_03(ALT0)/GPTMR1_CAPT_1(ALT1)/UART0_CTS(ALT3)/SPI2_CS_3(ALT5)/MCAN1_STBY(ALT7)/I2S3_TXD_0(ALT8)/SYSCTL_CLK_OBS_1(ALT24)passiveSMDcircle0.28×0.28
XTAL_INpassiveSMDcircle0.28×0.28
PC00/GPIO_C_00(ALT0)/GPTMR1_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/I2S2_MCLK(ALT8)/SDC0_DS(ALT17)/XPI_SLV_DQS(ALT30)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PC07/GPIO_C_07(ALT0)/GPTMR0_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI2_MOSI(ALT5)/I2S2_MCLK(ALT8)/SDC0_RSTN(ALT17)passiveSMDcircle0.28×0.28
PC12/GPIO_C_12(ALT0)/GPTMR1_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI3_MISO(ALT5)/PDM0_D_0(ALT10)/SDC1_DATA_3(ALT17)passiveSMDcircle0.28×0.28
PC15/GPIO_C_15(ALT0)/GPTMR0_COMP_3(ALT1)/UART3_TXD(ALT2)/SPI3_SCLK(ALT5)/MCAN3_TXD(ALT7)/PDM0_D_2(ALT10)/SDC1_DATA_1(ALT17)passiveSMDcircle0.28×0.28
PC30/GPIO_C_30(ALT0)/GPTMR2_CAPT_3(ALT1)/UART7_RXD(ALT2)/MCAN7_RXD(ALT7)/DAO_LN(ALT10)/SDC1_CDN(ALT17)passiveSMDcircle0.28×0.28
VIO_B04passiveSMDcircle0.28×0.28
PD12/GPIO_D_12(ALT0)/GPTMR5_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI2_MISO(ALT5)/I2S2_RXD_1(ALT8)/XPI0_CB_CS0(ALT14)/ETH0_RXD_1(ALT18)passiveSMDcircle0.28×0.28
PD15/GPIO_D_15(ALT0)/GPTMR4_COMP_3(ALT1)/UART3_TXD(ALT2)/SPI2_DAT3(ALT5)/MCAN3_TXD(ALT7)/I2S2_BCLK(ALT8)/XPI0_CB_D_0(ALT14)/ETH0_RXDV(ALT18)passiveSMDcircle0.28×0.28
PD19/GPIO_D_19(ALT0)/GPTMR7_CAPT_1(ALT1)/UART4_CTS(ALT3)/SPI1_CS_3(ALT5)/MCAN5_STBY(ALT7)/I2S2_TXD_1(ALT8)/XPI0_CB_D_2(ALT14)passiveSMDcircle0.28×0.28
PD28/GPIO_D_28(ALT0)/GPTMR7_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/SPI1_MISO(ALT5)/I2S3_TXD_0(ALT8)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PE09/GPIO_E_09(ALT0)/GPTMR0_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/SPI2_CS_1(ALT5)/MCAN2_RXD(ALT7)/I2S3_MCLK(ALT8)/ETH0_EVTI_3(ALT19)passiveSMDcircle0.28×0.28
PE08/GPIO_E_08(ALT0)/GPTMR0_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/SPI2_CS_2(ALT5)/MCAN2_TXD(ALT7)/I2S3_FCLK(ALT8)/ETH0_EVTO_3(ALT19)passiveSMDcircle0.28×0.28
PB04/GPIO_B_04(ALT0)/GPTMR5_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI2_CS_0(ALT5)/MCAN1_RXD(ALT7)/DIS0_B_2(ALT20)passiveSMDcircle0.28×0.28
PB05/GPIO_B_05(ALT0)/GPTMR5_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI2_SCLK(ALT5)/MCAN1_TXD(ALT7)/DIS0_G_7(ALT20)passiveSMDcircle0.28×0.28
PB22/GPIO_B_22(ALT0)/GPTMR6_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI1_MISO(ALT5)/I2S1_TXD_3(ALT8)/SDC0_DATA_6(ALT17)passiveSMDcircle0.28×0.28
PB24/GPIO_B_24(ALT0)/GPTMR6_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI0_CS_2(ALT5)/MCAN6_TXD(ALT7)/I2S1_MCLK(ALT8)/SDC0_DATA_7(ALT17)passiveSMDcircle0.28×0.28
PC13/GPIO_C_13(ALT0)/GPTMR1_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI3_MOSI(ALT5)/MCAN3_STBY(ALT7)/PDM0_CLK(ALT10)/SDC1_CMD(ALT17)passiveSMDcircle0.28×0.28
PC17/GPIO_C_17(ALT0)/GPTMR3_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/PDM0_D_3(ALT10)/SDC1_DATA_0(ALT17)passiveSMDcircle0.28×0.28
PD00/GPIO_D_00(ALT0)/GPTMR5_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/DAO_RN(ALT10)/SDC1_VON(ALT17)passiveSMDcircle0.28×0.28
PD02/GPIO_D_02(ALT0)/GPTMR5_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/ETH0_MDC(ALT18)passiveSMDcircle0.28×0.28
PD14/GPIO_D_14(ALT0)/GPTMR4_CAPT_3(ALT1)/UART3_RXD(ALT2)/SPI2_DAT2(ALT5)/MCAN3_RXD(ALT7)/I2S2_RXD_0(ALT8)/XPI0_CB_SCLK(ALT14)/ETH0_RXCK(ALT18)passiveSMDcircle0.28×0.28
PD17/GPIO_D_17(ALT0)/GPTMR7_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/I2S2_TXD_0(ALT8)/XPI0_CB_DQS(ALT14)/ETH0_RXD_2(ALT18)passiveSMDcircle0.28×0.28
PD26/GPIO_D_26(ALT0)/GPTMR6_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI1_CS_0(ALT5)/MCAN6_STBY(ALT7)/I2S3_TXD_1(ALT8)/ETH0_MDC(ALT18)passiveSMDcircle0.28×0.28
PE06/GPIO_E_06(ALT0)/GPTMR0_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI3_MISO(ALT5)/DAO_LN(ALT10)passiveSMDcircle0.28×0.28
PE11/GPIO_E_11(ALT0)/GPTMR0_CAPT_2(ALT1)/UART2_CTS(ALT3)/SPI2_SCLK(ALT5)/DAO_RN(ALT10)/ETH0_EVTI_2(ALT19)passiveSMDcircle0.28×0.28
PE10/GPIO_E_10(ALT0)/GPTMR0_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/SPI2_CS_0(ALT5)/MCAN2_STBY(ALT7)/I2S3_BCLK(ALT8)/ETH0_EVTO_1(ALT19)passiveSMDcircle0.28×0.28
PB06/GPIO_B_06(ALT0)/GPTMR4_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI2_MISO(ALT5)/DIS0_B_3(ALT20)passiveSMDcircle0.28×0.28
PB07/GPIO_B_07(ALT0)/GPTMR4_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI2_MOSI(ALT5)/DIS0_B_4(ALT20)passiveSMDcircle0.28×0.28
PB25/GPIO_B_25(ALT0)/GPTMR6_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI0_CS_1(ALT5)/MCAN6_RXD(ALT7)/I2S1_BCLK(ALT8)/SDC0_DATA_4(ALT17)passiveSMDcircle0.28×0.28
PB23/GPIO_B_23(ALT0)/GPTMR6_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI1_MOSI(ALT5)/I2S1_FCLK(ALT8)/SDC0_DATA_5(ALT17)passiveSMDcircle0.28×0.28
VIO_B02passiveSMDcircle0.28×0.28
PC16/GPIO_C_16(ALT0)/GPTMR3_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/PDM0_CLK(ALT10)/SDC1_CLK(ALT17)passiveSMDcircle0.28×0.28
PC31/GPIO_C_31(ALT0)/GPTMR2_COMP_3(ALT1)/UART7_TXD(ALT2)/MCAN7_TXD(ALT7)/DAO_LP(ALT10)/SDC1_VSEL(ALT17)passiveSMDcircle0.28×0.28
VIO_B05passiveSMDcircle0.28×0.28
PD13/GPIO_D_13(ALT0)/GPTMR5_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI2_MOSI(ALT5)/MCAN3_STBY(ALT7)/I2S2_MCLK(ALT8)/XPI0_CB_CS1(ALT14)/ETH0_RXD_0(ALT18)passiveSMDcircle0.28×0.28
PD16/GPIO_D_16(ALT0)/GPTMR7_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/I2S2_FCLK(ALT8)/XPI0_CB_D_1(ALT14)/ETH0_RXD_3(ALT18)passiveSMDcircle0.28×0.28
VIO_B06passiveSMDcircle0.28×0.28
PD29/GPIO_D_29(ALT0)/GPTMR7_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/SPI1_MOSI(ALT5)/MCAN7_STBY(ALT7)/I2S3_TXD_3(ALT8)/CPU0_NMI(ALT24)passiveSMDcircle0.28×0.28
PE05/GPIO_E_05(ALT0)/GPTMR1_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI3_SCLK(ALT5)/MCAN1_TXD(ALT7)/DAO_RP(ALT10)passiveSMDcircle0.28×0.28
PE13/GPIO_E_13(ALT0)/GPTMR1_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI2_MOSI(ALT5)/MCAN3_STBY(ALT7)/I2S3_RXD_0(ALT8)/PDM0_D_3(ALT10)/ETH0_EVTI_1(ALT19)passiveSMDcircle0.28×0.28
PE12/GPIO_E_12(ALT0)/GPTMR1_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI2_MISO(ALT5)/I2S3_RXD_1(ALT8)/PDM0_D_2(ALT10)/ETH0_EVTO_2(ALT19)passiveSMDcircle0.28×0.28
PB08/GPIO_B_08(ALT0)/GPTMR4_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/SPI3_CS_2(ALT5)/MCAN2_TXD(ALT7)/DIS0_B_6(ALT20)passiveSMDcircle0.28×0.28
PB09/GPIO_B_09(ALT0)/GPTMR4_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/SPI3_CS_1(ALT5)/MCAN2_RXD(ALT7)/DIS0_B_5(ALT20)passiveSMDcircle0.28×0.28
PB26/GPIO_B_26(ALT0)/GPTMR6_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI0_CS_0(ALT5)/MCAN6_STBY(ALT7)/I2S1_RXD_1(ALT8)/SDC0_DATA_3(ALT17)passiveSMDcircle0.28×0.28
PB27/GPIO_B_27(ALT0)/GPTMR6_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI0_SCLK(ALT5)/I2S1_RXD_3(ALT8)/SDC0_DATA_0(ALT17)passiveSMDcircle0.28×0.28
PC14/GPIO_C_14(ALT0)/GPTMR0_CAPT_3(ALT1)/UART3_RXD(ALT2)/SPI3_CS_0(ALT5)/MCAN3_RXD(ALT7)/PDM0_D_1(ALT10)/SDC1_DATA_2(ALT17)passiveSMDcircle0.28×0.28
VIO_B03passiveSMDcircle0.28×0.28
PD01/GPIO_D_01(ALT0)/GPTMR5_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/DAO_RP(ALT10)/SDC1_WP(ALT17)passiveSMDcircle0.28×0.28
PD03/GPIO_D_03(ALT0)/GPTMR5_CAPT_1(ALT1)/UART0_CTS(ALT3)/MCAN1_STBY(ALT7)/ETH0_MDIO(ALT18)passiveSMDcircle0.28×0.28
VIO_B06passiveSMDcircle0.28×0.28
PD18/GPIO_D_18(ALT0)/GPTMR7_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S2_MCLK(ALT8)/XPI0_CB_D_3(ALT14)passiveSMDcircle0.28×0.28
PD27/GPIO_D_27(ALT0)/GPTMR6_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI1_SCLK(ALT5)/I2S3_TXD_2(ALT8)/ETH0_MDIO(ALT18)passiveSMDcircle0.28×0.28
PE07/GPIO_E_07(ALT0)/GPTMR0_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI3_MOSI(ALT5)/DAO_LP(ALT10)passiveSMDcircle0.28×0.28
PE15/GPIO_E_15(ALT0)/GPTMR0_COMP_3(ALT1)/UART3_TXD(ALT2)/SPI2_DAT3(ALT5)/MCAN3_TXD(ALT7)/I2S3_RXD_2(ALT8)/ETH0_MDC(ALT18)/ETH0_EVTI_0(ALT19)passiveSMDcircle0.28×0.28
PE14/GPIO_E_14(ALT0)/GPTMR0_CAPT_3(ALT1)/UART3_RXD(ALT2)/SPI2_DAT2(ALT5)/MCAN3_RXD(ALT7)/I2S3_RXD_3(ALT8)/PDM0_CLK(ALT10)/ETH0_MDIO(ALT18)/ETH0_EVTO_0(ALT19)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PB28/GPIO_B_28(ALT0)/GPTMR7_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/SPI0_MISO(ALT5)/I2S1_RXD_0(ALT8)/SDC0_DATA_1(ALT17)/CPU0_NMI(ALT24)passiveSMDcircle0.28×0.28
VIO_B01passiveSMDcircle0.28×0.28
USB0_VBUSpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VIO_B11passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VIO_B07passiveSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PB10/GPIO_B_10(ALT0)/GPTMR4_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/SPI3_CS_0(ALT5)/MCAN2_STBY(ALT7)/DIS0_EN(ALT20)passiveSMDcircle0.28×0.28
PB11/GPIO_B_11(ALT0)/GPTMR4_CAPT_2(ALT1)/UART2_CTS(ALT3)/SPI3_SCLK(ALT5)/DIS0_B_7(ALT20)passiveSMDcircle0.28×0.28
PB29/GPIO_B_29(ALT0)/GPTMR7_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/SPI0_MOSI(ALT5)/MCAN7_STBY(ALT7)/I2S1_RXD_2(ALT8)/SDC0_DATA_2(ALT17)passiveSMDcircle0.28×0.28
PB31/GPIO_B_31(ALT0)/GPTMR6_COMP_3(ALT1)/UART7_TXD(ALT2)/SPI0_DAT3(ALT5)/MCAN7_TXD(ALT7)/SDC0_CMD(ALT17)passiveSMDcircle0.28×0.28
VUSBpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VIO_B08passiveSMDcircle0.28×0.28
DDR_DM1passiveSMDcircle0.28×0.28
DDR_D9passiveSMDcircle0.28×0.28
DDR_D6passiveSMDcircle0.28×0.28
DDR_D4passiveSMDcircle0.28×0.28
PB12/GPIO_B_12(ALT0)/GPTMR5_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI3_MISO(ALT5)/DIS0_HSYNC(ALT20)passiveSMDcircle0.28×0.28
PB13/GPIO_B_13(ALT0)/GPTMR5_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI3_MOSI(ALT5)/MCAN3_STBY(ALT7)/DIS0_CLK(ALT20)passiveSMDcircle0.28×0.28
PA29/GPIO_A_29(ALT0)/GPTMR3_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/MCAN7_STBY(ALT7)/CAM0_XCLK(ALT22)passiveSMDcircle0.28×0.28
PB30/GPIO_B_30(ALT0)/GPTMR6_CAPT_3(ALT1)/UART7_RXD(ALT2)/SPI0_DAT2(ALT5)/MCAN7_RXD(ALT7)/SDC0_CLK(ALT17)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VUSBpassiveSMDcircle0.28×0.28
VPLLpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDD_2V5CAPpowerSMDcircle0.28×0.28
VIO_B08passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DDR_D11passiveSMDcircle0.28×0.28
DDR_D13passiveSMDcircle0.28×0.28
DDR_DQS0NpassiveSMDcircle0.28×0.28
DDR_DQS0PpassiveSMDcircle0.28×0.28
PB14/GPIO_B_14(ALT0)/GPTMR4_CAPT_3(ALT1)/UART3_RXD(ALT2)/SPI3_DAT2(ALT5)/MCAN3_RXD(ALT7)/DIS0_VSYNC(ALT20)/SYSCTL_CLK_OBS_1(ALT24)passiveSMDcircle0.28×0.28
PB15/GPIO_B_15(ALT0)/GPTMR4_COMP_3(ALT1)/UART3_TXD(ALT2)/SPI3_DAT3(ALT5)/MCAN3_TXD(ALT7)/SDC0_DS(ALT17)/SYSCTL_CLK_OBS_3(ALT24)passiveSMDcircle0.28×0.28
PA28/GPIO_A_28(ALT0)/GPTMR3_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/DIS0_R_0(ALT20)passiveSMDcircle0.28×0.28
VIO_B01passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VPLLpassiveSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_2V5CAPpowerSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
DDR_D15passiveSMDcircle0.28×0.28
DDR_D2passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PA30/GPIO_A_30(ALT0)/GPTMR2_CAPT_3(ALT1)/UART7_RXD(ALT2)/MCAN7_RXD(ALT7)/DIS0_R_2(ALT20)passiveSMDcircle0.28×0.28
PA31/GPIO_A_31(ALT0)/GPTMR2_COMP_3(ALT1)/UART7_TXD(ALT2)/MCAN7_TXD(ALT7)/DIS0_R_1(ALT20)passiveSMDcircle0.28×0.28
PB16/GPIO_B_16(ALT0)/GPTMR7_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/CAM0_D_6(ALT22)passiveSMDcircle0.28×0.28
PB17/GPIO_B_17(ALT0)/GPTMR7_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/CAM0_D_7(ALT22)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VPLLpassiveSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_2V5CAPpowerSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DDR_D14passiveSMDcircle0.28×0.28
DDR_D12passiveSMDcircle0.28×0.28
DDR_D0passiveSMDcircle0.28×0.28
DDR_DM0passiveSMDcircle0.28×0.28
PB00/GPIO_B_00(ALT0)/GPTMR5_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/DIS0_G_1(ALT20)passiveSMDcircle0.28×0.28
PB01/GPIO_B_01(ALT0)/GPTMR5_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/DIS0_G_0(ALT20)passiveSMDcircle0.28×0.28
PB18/GPIO_B_18(ALT0)/GPTMR7_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S1_TXD_1(ALT8)/CAM0_D_9(ALT22)passiveSMDcircle0.28×0.28
PB19/GPIO_B_19(ALT0)/GPTMR7_CAPT_1(ALT1)/UART4_CTS(ALT3)/SPI0_CS_3(ALT5)/MCAN5_STBY(ALT7)/I2S1_MCLK(ALT8)/CAM0_D_8(ALT22)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DDR_DQS1NpassiveSMDcircle0.28×0.28
DDR_DQS1PpassiveSMDcircle0.28×0.28
DDR_D1passiveSMDcircle0.28×0.28
DDR_D3passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VIO_B01passiveSMDcircle0.28×0.28
VIO_B01passiveSMDcircle0.28×0.28
VDDA_MIPIpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DDR_VREFpassiveSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PB02/GPIO_B_02(ALT0)/GPTMR5_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/DIS0_B_1(ALT20)passiveSMDcircle0.28×0.28
PB03/GPIO_B_03(ALT0)/GPTMR5_CAPT_1(ALT1)/UART0_CTS(ALT3)/SPI3_CS_3(ALT5)/MCAN1_STBY(ALT7)/DIS0_B_0(ALT20)passiveSMDcircle0.28×0.28
PB21/GPIO_B_21(ALT0)/GPTMR7_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI1_SCLK(ALT5)/MCAN5_TXD(ALT7)/I2S1_TXD_0(ALT8)/CAM0_VSYNC(ALT22)passiveSMDcircle0.28×0.28
PB20/GPIO_B_20(ALT0)/GPTMR7_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI1_CS_0(ALT5)/MCAN5_RXD(ALT7)/I2S1_TXD_2(ALT8)/CAM0_HSYNC(ALT22)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VSSAgroundSMDcircle0.28×0.28
DDR_D10passiveSMDcircle0.28×0.28
DDR_D8passiveSMDcircle0.28×0.28
DDR_D7passiveSMDcircle0.28×0.28
DDR_D5passiveSMDcircle0.28×0.28
PA12/GPIO_A_12(ALT0)/GPTMR1_CAPT_3(ALT1)/UART3_CTS(ALT3)/I2C1_SDA(ALT4)/SPI0_MISO(ALT5)/PDM0_D_0(ALT10)/DIS0_G_6(ALT20)/CAM0_D_4(ALT22)/@passiveSMDcircle0.28×0.28
PA13/GPIO_A_13(ALT0)/GPTMR1_COMP_3(ALT1)/UART3_DE(ALT2)/UART3_RTS(ALT3)/I2C1_SCL(ALT4)/SPI0_MOSI(ALT5)/MCAN3_STBY(ALT7)/PDM0_D_2(ALT10)/DIS0_G_5(ALT20)/CAM0_D_5(ALT22)passiveSMDcircle0.28×0.28
PA26/GPIO_A_26(ALT0)/GPTMR2_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI1_CS_0(ALT5)/MCAN6_STBY(ALT7)/SDC1_CDN(ALT17)/CAM0_PIXCLK(ALT22)passiveSMDcircle0.28×0.28
PA27/GPIO_A_27(ALT0)/GPTMR2_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI1_SCLK(ALT5)/SDC1_WP(ALT17)/CAM0_D_2(ALT22)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VANApassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DDR_BA2passiveSMDcircle0.28×0.28
DDR_BA0passiveSMDcircle0.28×0.28
DDR_ODT0passiveSMDcircle0.28×0.28
DDR_ODT1passiveSMDcircle0.28×0.28
PA10/GPIO_A_10(ALT0)/GPTMR0_COMP_2(ALT1)/UART2_DE(ALT2)/UART2_RTS(ALT3)/SPI0_CS_0(ALT5)/MCAN2_STBY(ALT7)/PDM0_CLK(ALT10)/DIS0_G_4(ALT20)/CAM0_D_3(ALT22)passiveSMDcircle0.28×0.28
PA11/GPIO_A_11(ALT0)/GPTMR0_CAPT_2(ALT1)/UART2_CTS(ALT3)/SPI0_SCLK(ALT5)/PDM0_CLK(ALT10)/DIS0_G_3(ALT20)/CAM0_D_2(ALT22)passiveSMDcircle0.28×0.28
PA25/GPIO_A_25(ALT0)/GPTMR2_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI1_MOSI(ALT5)/MCAN6_RXD(ALT7)/I2S0_MCLK(ALT8)/SDC1_VSEL(ALT17)/CAM0_D_3(ALT22)passiveSMDcircle0.28×0.28
VIO_B00passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VANApassiveSMDcircle0.28×0.28
VSSAgroundSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
DDR_CS0passiveSMDcircle0.28×0.28
DDR_CS1passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PA08/GPIO_A_08(ALT0)/GPTMR0_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/MCAN2_TXD(ALT7)/PDM0_D_1(ALT10)/JTAG_TRST(ALT24)passiveSMDcircle0.28×0.28
PA09/GPIO_A_09(ALT0)/GPTMR0_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/MCAN2_RXD(ALT7)/PDM0_D_3(ALT10)passiveSMDcircle0.28×0.28
PA23/GPIO_A_23(ALT0)/GPTMR2_COMP_0(ALT1)/UART5_TXD(ALT2)/I2S0_TXD_0(ALT8)/SDC0_RSTN(ALT17)/CAM0_D_4(ALT22)passiveSMDcircle0.28×0.28
PA24/GPIO_A_24(ALT0)/GPTMR2_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI1_MISO(ALT5)/MCAN6_TXD(ALT7)/I2S0_TXD_2(ALT8)/SDC1_VON(ALT17)/CAM0_D_5(ALT22)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VANApassiveSMDcircle0.28×0.28
VREFHpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DDR_WEpassiveSMDcircle0.28×0.28
DDR_CASpassiveSMDcircle0.28×0.28
DDR_A7passiveSMDcircle0.28×0.28
DDR_RSTpassiveSMDcircle0.28×0.28
PA06/GPIO_A_06(ALT0)/GPTMR0_CAPT_0(ALT1)/UART1_RXD(ALT2)/JTAG_TCK(ALT24)passiveSMDcircle0.28×0.28
PA07/GPIO_A_07(ALT0)/GPTMR0_COMP_0(ALT1)/UART1_TXD(ALT2)/JTAG_TMS(ALT24)passiveSMDcircle0.28×0.28
PA21/GPIO_A_21(ALT0)/GPTMR3_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/MCAN5_TXD(ALT7)/I2S0_TXD_1(ALT8)/CAM0_XCLK(ALT22)passiveSMDcircle0.28×0.28
PA22/GPIO_A_22(ALT0)/GPTMR2_CAPT_0(ALT1)/UART5_RXD(ALT2)/I2S0_TXD_3(ALT8)passiveSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VREFLpassiveSMDcircle0.28×0.28
VREFHpassiveSMDcircle0.28×0.28
DDR_VREFpassiveSMDcircle0.28×0.28
DDR_RASpassiveSMDcircle0.28×0.28
DDR_A9passiveSMDcircle0.28×0.28
DDR_A13passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PA20/GPIO_A_20(ALT0)/GPTMR3_CAPT_2(ALT1)/UART5_CTS(ALT3)/MCAN5_RXD(ALT7)/I2S0_BCLK(ALT8)/DIS0_G_2(ALT20)/CAM0_PIXCLK(ALT22)passiveSMDcircle0.28×0.28
VIO_B00passiveSMDcircle0.28×0.28
VDD_SOCpowerSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VIO_B10passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VREFLpassiveSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PA04/GPIO_A_04(ALT0)/GPTMR1_CAPT_2(ALT1)/UART1_CTS(ALT3)/MCAN1_RXD(ALT7)/JTAG_TDO(ALT24)passiveSMDcircle0.28×0.28
PA05/GPIO_A_05(ALT0)/GPTMR1_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/MCAN1_TXD(ALT7)/JTAG_TDI(ALT24)passiveSMDcircle0.28×0.28
PA18/GPIO_A_18(ALT0)/GPTMR3_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S0_FCLK(ALT8)/DIS0_R_7(ALT20)/CAM0_D_7(ALT22)/CPU0_NMI(ALT24)passiveSMDcircle0.28×0.28
PA19/GPIO_A_19(ALT0)/GPTMR3_CAPT_1(ALT1)/UART4_CTS(ALT3)/MCAN5_STBY(ALT7)/I2S0_MCLK(ALT8)/DIS0_R_6(ALT20)/CAM0_D_6(ALT22)passiveSMDcircle0.28×0.28
PZ07/GPIO_Z_07(ALT0)/GPTMR2_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI0_MOSI(ALT5)passiveSMDcircle0.28×0.28
VPMCpassiveSMDcircle0.28×0.28
PZ01/GPIO_Z_01(ALT0)/GPTMR3_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)passiveSMDcircle0.28×0.28
PF09/GPIO_F_09(ALT0)/GPTMR4_CAPT_1(ALT1)/UART2_RXD(ALT2)/I2C0_SDA(ALT4)/SPI3_CS_1(ALT5)/MCAN2_RXD(ALT7)/ETH0_MDC(ALT18)/ETH0_EVTI_3(ALT19)passiveSMDcircle0.28×0.28
VIO_B09passiveSMDcircle0.28×0.28
PE28/GPIO_E_28(ALT0)/GPTMR3_CAPT_3(ALT1)/UART7_CTS(ALT3)/I2C3_SDA(ALT4)/SPI1_MISO(ALT5)/DAO_RP(ALT10)/USB0_ID(ALT24)passiveSMDcircle0.28×0.28
VDDRpassiveSMDcircle0.28×0.28
DDR_CKPpassiveSMDcircle0.28×0.28
DDR_A2passiveSMDcircle0.28×0.28
DDR_A5passiveSMDcircle0.28×0.28
PA02/GPIO_A_02(ALT0)/GPTMR1_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/DAO_LN(ALT10)passiveSMDcircle0.28×0.28
PA03/GPIO_A_03(ALT0)/GPTMR1_CAPT_1(ALT1)/UART0_CTS(ALT3)/MCAN1_STBY(ALT7)/DAO_LP(ALT10)passiveSMDcircle0.28×0.28
PA16/GPIO_A_16(ALT0)/GPTMR3_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/I2S0_RXD_0(ALT8)/DIS0_R_5(ALT20)/CAM0_D_9(ALT22)passiveSMDcircle0.28×0.28
PA17/GPIO_A_17(ALT0)/GPTMR3_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/I2S0_RXD_2(ALT8)/DIS0_R_4(ALT20)/CAM0_D_8(ALT22)passiveSMDcircle0.28×0.28
VDD_PMCCAPpowerSMDcircle0.28×0.28
PZ05/GPIO_Z_05(ALT0)/GPTMR3_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI0_SCLK(ALT5)/MCAN5_TXD(ALT7)/DAO_LN(ALT10)passiveSMDcircle0.28×0.28
PZ03/GPIO_Z_03(ALT0)/GPTMR3_CAPT_1(ALT1)/UART4_CTS(ALT3)/MCAN5_STBY(ALT7)/DAO_RN(ALT10)passiveSMDcircle0.28×0.28
VBATpowerSMDcircle0.28×0.28
PF07/GPIO_F_07(ALT0)/GPTMR4_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI2_MOSI(ALT5)/ETH0_EVTI_1(ALT19)passiveSMDcircle0.28×0.28
PE30/GPIO_E_30(ALT0)/GPTMR2_CAPT_3(ALT1)/UART7_RXD(ALT2)/SPI1_DAT2(ALT5)/MCAN7_RXD(ALT7)/DAO_RN(ALT10)/USB0_OC(ALT24)passiveSMDcircle0.28×0.28
VIO_B09passiveSMDcircle0.28×0.28
DDR_A10passiveSMDcircle0.28×0.28
DDR_CKNpassiveSMDcircle0.28×0.28
DDR_A0passiveSMDcircle0.28×0.28
DDR_A3passiveSMDcircle0.28×0.28
PA00/GPIO_A_00(ALT0)/GPTMR1_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/DAO_RN(ALT10)passiveSMDcircle0.28×0.28
PA01/GPIO_A_01(ALT0)/GPTMR1_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/DAO_RP(ALT10)passiveSMDcircle0.28×0.28
PA14/GPIO_A_14(ALT0)/GPTMR0_CAPT_3(ALT1)/UART3_RXD(ALT2)/MCAN3_RXD(ALT7)/I2S0_RXD_1(ALT8)/DIS0_CLK(ALT20)/CAM0_VSYNC(ALT22)passiveSMDcircle0.28×0.28
PA15/GPIO_A_15(ALT0)/GPTMR0_COMP_3(ALT1)/UART3_TXD(ALT2)/MCAN3_TXD(ALT7)/I2S0_RXD_3(ALT8)/DIS0_R_3(ALT20)/CAM0_HSYNC(ALT22)passiveSMDcircle0.28×0.28
PZ06/GPIO_Z_06(ALT0)/GPTMR2_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI0_MISO(ALT5)passiveSMDcircle0.28×0.28
VPMCpassiveSMDcircle0.28×0.28
PZ00/GPIO_Z_00(ALT0)/GPTMR3_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)passiveSMDcircle0.28×0.28
PF08/GPIO_F_08(ALT0)/GPTMR4_COMP_1(ALT1)/UART2_TXD(ALT2)/I2C0_SCL(ALT4)/SPI3_CS_2(ALT5)/MCAN2_TXD(ALT7)/ETH0_MDIO(ALT18)/ETH0_EVTI_2(ALT19)passiveSMDcircle0.28×0.28
PE31/GPIO_E_31(ALT0)/GPTMR2_COMP_3(ALT1)/UART7_TXD(ALT2)/SPI1_DAT3(ALT5)/MCAN7_TXD(ALT7)/DAO_LP(ALT10)passiveSMDcircle0.28×0.28
PE27/GPIO_E_27(ALT0)/GPTMR2_CAPT_2(ALT1)/UART6_CTS(ALT3)/SPI1_SCLK(ALT5)/I2S0_MCLK(ALT8)/USB0_PWR(ALT24)passiveSMDcircle0.28×0.28
PE25/GPIO_E_25(ALT0)/GPTMR2_CAPT_1(ALT1)/UART6_RXD(ALT2)/I2C2_SDA(ALT4)/SPI1_CS_1(ALT5)/MCAN6_RXD(ALT7)/I2S0_MCLK(ALT8)/ETH0_MDC(ALT18)passiveSMDcircle0.28×0.28
DDR_A15passiveSMDcircle0.28×0.28
DDR_A12passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DCDC_GNDpassiveSMDcircle0.28×0.28
DCDC_GNDpassiveSMDcircle0.28×0.28
DCDC_GNDpassiveSMDcircle0.28×0.28
DCDC_SNSpassiveSMDcircle0.28×0.28
RESETNpassiveSMDcircle0.28×0.28
PZ04/GPIO_Z_04(ALT0)/GPTMR3_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI0_CS_0(ALT5)/MCAN5_RXD(ALT7)/DAO_LP(ALT10)passiveSMDcircle0.28×0.28
PZ02/GPIO_Z_02(ALT0)/GPTMR3_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/DAO_RP(ALT10)passiveSMDcircle0.28×0.28
VBATpowerSMDcircle0.28×0.28
PF06/GPIO_F_06(ALT0)/GPTMR4_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI2_MISO(ALT5)/ETH0_EVTI_0(ALT19)passiveSMDcircle0.28×0.28
PE29/GPIO_E_29(ALT0)/GPTMR3_COMP_3(ALT1)/UART7_DE(ALT2)/UART7_RTS(ALT3)/I2C3_SCL(ALT4)/SPI1_MOSI(ALT5)/MCAN7_STBY(ALT7)/DAO_LN(ALT10)passiveSMDcircle0.28×0.28
PE26/GPIO_E_26(ALT0)/GPTMR2_COMP_2(ALT1)/UART6_DE(ALT2)/UART6_RTS(ALT3)/SPI1_CS_0(ALT5)/MCAN6_STBY(ALT7)/I2S0_BCLK(ALT8)passiveSMDcircle0.28×0.28
PE24/GPIO_E_24(ALT0)/GPTMR2_COMP_1(ALT1)/UART6_TXD(ALT2)/I2C2_SCL(ALT4)/SPI1_CS_2(ALT5)/MCAN6_TXD(ALT7)/I2S0_FCLK(ALT8)/ETH0_MDIO(ALT18)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DDR_A1passiveSMDcircle0.28×0.28
DDR_BA1passiveSMDcircle0.28×0.28
DCDC_LPpassiveSMDcircle0.28×0.28
DCDC_LPpassiveSMDcircle0.28×0.28
DCDC_LPpassiveSMDcircle0.28×0.28
DCDC_GNDpassiveSMDcircle0.28×0.28
PY07/GPIO_Y_07(ALT0)/GPTMR0_COMP_0(ALT1)/UART1_TXD(ALT2)/SPI2_MOSI(ALT5)/PDM0_D_0(ALT10)passiveSMDcircle0.28×0.28
PY03/GPIO_Y_03(ALT0)/GPTMR1_CAPT_1(ALT1)/UART0_CTS(ALT3)/MCAN1_STBY(ALT7)/PDM0_D_2(ALT10)passiveSMDcircle0.28×0.28
RTC_XTAL_OUTpassiveSMDcircle0.28×0.28
PF05/GPIO_F_05(ALT0)/GPTMR5_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI2_SCLK(ALT5)/MCAN1_TXD(ALT7)/PDM0_D_0(ALT10)/ETH0_EVTO_3(ALT19)passiveSMDcircle0.28×0.28
PF01/GPIO_F_01(ALT0)/GPTMR5_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)/PDM0_D_2(ALT10)/CPU0_NMI(ALT24)passiveSMDcircle0.28×0.28
PE21/GPIO_E_21(ALT0)/GPTMR3_COMP_2(ALT1)/UART5_DE(ALT2)/UART5_RTS(ALT3)/SPI0_SCLK(ALT5)/MCAN5_TXD(ALT7)/I2S0_RXD_1(ALT8)/ETH0_EVTI_2(ALT19)passiveSMDcircle0.28×0.28
PE19/GPIO_E_19(ALT0)/GPTMR3_CAPT_1(ALT1)/UART4_CTS(ALT3)/SPI1_CS_3(ALT5)/MCAN5_STBY(ALT7)/I2S0_TXD_1(ALT8)/ETH0_EVTI_1(ALT19)passiveSMDcircle0.28×0.28
DDR_ZQpassiveSMDcircle0.28×0.28
DDR_A11passiveSMDcircle0.28×0.28
DDR_A4passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DCDC_INpassiveSMDcircle0.28×0.28
DCDC_INpassiveSMDcircle0.28×0.28
DCDCM_SNSpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PY05/GPIO_Y_05(ALT0)/GPTMR1_COMP_2(ALT1)/UART1_DE(ALT2)/UART1_RTS(ALT3)/SPI2_SCLK(ALT5)/MCAN1_TXD(ALT7)/PDM0_D_1(ALT10)passiveSMDcircle0.28×0.28
PY01/GPIO_Y_01(ALT0)/GPTMR1_CAPT_0(ALT1)/UART0_RXD(ALT2)/MCAN0_RXD(ALT7)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PF03/GPIO_F_03(ALT0)/GPTMR5_CAPT_1(ALT1)/UART0_CTS(ALT3)/SPI3_CS_3(ALT5)/MCAN1_STBY(ALT7)/PDM0_D_1(ALT10)/ETH0_EVTO_1(ALT19)/USB0_OC(ALT24)passiveSMDcircle0.28×0.28
PE23/GPIO_E_23(ALT0)/GPTMR2_COMP_0(ALT1)/UART5_TXD(ALT2)/SPI0_MOSI(ALT5)/I2S0_RXD_3(ALT8)/ETH0_EVTI_3(ALT19)/USB0_OC(ALT24)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PE17/GPIO_E_17(ALT0)/GPTMR3_CAPT_0(ALT1)/UART4_RXD(ALT2)/MCAN4_RXD(ALT7)/I2S0_TXD_3(ALT8)/ETH0_EVTI_0(ALT19)passiveSMDcircle0.28×0.28
DDR_CKE0passiveSMDcircle0.28×0.28
DDR_A6passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DCDC_INpassiveSMDcircle0.28×0.28
DCDC_INpassiveSMDcircle0.28×0.28
DCDCM_LPpassiveSMDcircle0.28×0.28
DCDC_GNDpassiveSMDcircle0.28×0.28
PY06/GPIO_Y_06(ALT0)/GPTMR0_CAPT_0(ALT1)/UART1_RXD(ALT2)/SPI2_MISO(ALT5)/PDM0_CLK(ALT10)passiveSMDcircle0.28×0.28
PY02/GPIO_Y_02(ALT0)/GPTMR1_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/PDM0_CLK(ALT10)passiveSMDcircle0.28×0.28
RTC_XTAL_INpassiveSMDcircle0.28×0.28
PF04/GPIO_F_04(ALT0)/GPTMR5_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI2_CS_0(ALT5)/MCAN1_RXD(ALT7)/PDM0_CLK(ALT10)/ETH0_EVTO_2(ALT19)/USB0_ID(ALT24)passiveSMDcircle0.28×0.28
PF00/GPIO_F_00(ALT0)/GPTMR5_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)/PDM0_CLK(ALT10)/USB0_PWR(ALT24)passiveSMDcircle0.28×0.28
PE20/GPIO_E_20(ALT0)/GPTMR3_CAPT_2(ALT1)/UART5_CTS(ALT3)/SPI0_CS_0(ALT5)/MCAN5_RXD(ALT7)/I2S0_RXD_0(ALT8)/ETH0_EVTO_2(ALT19)/USB0_ID(ALT24)passiveSMDcircle0.28×0.28
PE18/GPIO_E_18(ALT0)/GPTMR3_COMP_1(ALT1)/UART4_DE(ALT2)/UART4_RTS(ALT3)/MCAN4_STBY(ALT7)/I2S0_TXD_0(ALT8)/ETH0_EVTO_1(ALT19)/USB0_PWR(ALT24)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DDR_A8passiveSMDcircle0.28×0.28
DDR_A14passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
DCDC_INpassiveSMDcircle0.28×0.28
DCDCM_LPpassiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PY04/GPIO_Y_04(ALT0)/GPTMR1_CAPT_2(ALT1)/UART1_CTS(ALT3)/SPI2_CS_0(ALT5)/MCAN1_RXD(ALT7)/PDM0_D_3(ALT10)passiveSMDcircle0.28×0.28
PY00/GPIO_Y_00(ALT0)/GPTMR1_COMP_0(ALT1)/UART0_TXD(ALT2)/MCAN0_TXD(ALT7)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PF02/GPIO_F_02(ALT0)/GPTMR5_COMP_1(ALT1)/UART0_DE(ALT2)/UART0_RTS(ALT3)/MCAN0_STBY(ALT7)/PDM0_D_3(ALT10)/ETH0_EVTO_0(ALT19)passiveSMDcircle0.28×0.28
PE22/GPIO_E_22(ALT0)/GPTMR2_CAPT_0(ALT1)/UART5_RXD(ALT2)/SPI0_MISO(ALT5)/I2S0_RXD_2(ALT8)/ETH0_EVTO_3(ALT19)passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28
PE16/GPIO_E_16(ALT0)/GPTMR3_COMP_0(ALT1)/UART4_TXD(ALT2)/MCAN4_TXD(ALT7)/I2S0_TXD_2(ALT8)/ETH0_EVTO_0(ALT19)passiveSMDcircle0.28×0.28
DDR_CKE1passiveSMDcircle0.28×0.28
VSSgroundSMDcircle0.28×0.28

Key Parameters

Frequency
600MHz

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Details

Category
microcontroller
MPN
HPM6880IBD1
Manufacturer
HPMICRO
Package
BGA-417(17x17)
Footprint
BGA-417_L17.0-W17.0-P0.57-TL_HPM6800
JLCPCB
C49374602
LCSC
C49374602
Lifecycle
active
Mounting
SMT
RoHS
Compliant
MSL
MSL 3
ECCN
-

JLCPCB Stock & Pricing

In Stock(13 pcs)
1-9 pcs$14.3052
10-29 pcs$13.6240
30-89 pcs$12.4433
90-91 pcs$11.4136
92-93 pcs$11.4136
94+ pcs$11.4136